Patents by Inventor Christian Cojocaru
Christian Cojocaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10520116Abstract: A method of manufacturing a shrouded pipe comprising an inner pipe section for providing a primary fluid path and an outer pipe section for enclosing the inner pipe section to provide a secondary fluid path. The method includes opening the outer pipe section by separating first and second longitudinal edges which split the outer pipe section along a longitudinal line, assembling the outer pipe section with the inner pipe section by passing the inner pipe section between the separated first and second longitudinal edges, and closing the outer pipe section by bringing the first and second longitudinal edges together and joining the first and second longitudinal edges together. An advantage of this method is that close manufacturing tolerances can be achieved without a complex or difficult assembly process.Type: GrantFiled: May 19, 2017Date of Patent: December 31, 2019Assignee: Airbus Operations GmbHInventors: Michael Rappitsch, Konrad Rauch, Dirk Schwarze, Christoph Heimerdinger, Daniel-Christian Cojocaru
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Patent number: 10411663Abstract: A Galvanically Isolated Amplifier (GIA) includes an isolation barrier to galvanically isolate high voltage circuitry from low voltage circuitry. The high voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to ground potential at a first potential relative to the ground potential. The low voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to the ground potential at a second potential, the second potential being smaller than the first potential. A Radio Frequency (RF) carrier is digitally Phase Shift Keying (PSK) modulated for transmission across the isolation barrier. The unmodulated RF carrier could also be transmitted across the isolation barrier. PSK modulation could be applied to the RF carrier based on a test waveform to generate a PSK-modulated test signal for transmission while a voltage transient is applied between the high voltage circuitry and the low voltage circuitry.Type: GrantFiled: November 14, 2017Date of Patent: September 10, 2019Assignee: SOLANTRO SEMICONDUCTOR CORP.Inventors: Christian Cojocaru, Igor Miletic, Tudor Lipan, Michael Sawires
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Publication number: 20180323759Abstract: A Galvanically Isolated Amplifier (GIA) includes an isolation barrier to galvanically isolate high voltage circuitry from low voltage circuitry. The high voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to ground potential at a first potential relative to the ground potential. The low voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to the ground potential at a second potential, the second potential being smaller than the first potential. A Radio Frequency (RF) carrier is digitally Phase Shift Keying (PSK) modulated for transmission across the isolation barrier. The unmodulated RF carrier could also be transmitted across the isolation barrier. PSK modulation could be applied to the RF carrier based on a test waveform to generate a PSK-modulated test signal for transmission while a voltage transient is applied between the high voltage circuitry and the low voltage circuitry.Type: ApplicationFiled: November 14, 2017Publication date: November 8, 2018Inventors: Christian COJOCARU, Igor MILETIC, Tudor LIPAN, Michael SAWIRES
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Publication number: 20170335997Abstract: A method of manufacturing a shrouded pipe comprising an inner pipe section for providing a primary fluid path and an outer pipe section for enclosing the inner pipe section to provide a secondary fluid path. The method includes opening the outer pipe section by separating first and second longitudinal edges which split the outer pipe section along a longitudinal line, assembling the outer pipe section with the inner pipe section by passing the inner pipe section between the separated first and second longitudinal edges, and closing the outer pipe section by bringing the first and second longitudinal edges together and joining the first and second longitudinal edges together. An advantage of this method is that close manufacturing tolerances can be achieved without a complex or difficult assembly process.Type: ApplicationFiled: May 19, 2017Publication date: November 23, 2017Inventors: Michael RAPPITSCH, Konrad RAUCH, Dirk SCHWARZE, Christoph HEIMERDINGER, Daniel-Christian COJOCARU
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Publication number: 20140029308Abstract: An inverter having extended lifetime DC-link capacitors for use with a DC power source such as a photovoltaic panel is described. The inverter uses a plurality of switchable capacitors to control the voltage across the capacitors. The expected lifetime of the capacitors can be extended by disconnecting unnecessary capacitors from a voltage. The capacitors may be periodically connected to a voltage in order to maintain an oxide dielectric layer of the capacitor.Type: ApplicationFiled: March 8, 2012Publication date: January 30, 2014Applicant: SOLANTRO SEMICONDUCTOR CORP.Inventors: Christian Cojocaru, Raymond Kenneth Orr
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Publication number: 20130342389Abstract: A photovoltaic (PV) panel is described that can be used in a PV installation, in cooperation with a central control unit to provide a map of locations of individual PV panels. The map can be determined by the central control unit based on measurements of a characteristic made at the plurality of PV panels. The characteristic provides an indication of adjacent PV panels, allowing the map of locations of individual PV panels to be constructed.Type: ApplicationFiled: March 8, 2012Publication date: December 26, 2013Applicant: SOLANTRO SEMICONDUCTOR CORP.Inventors: Christian Cojocaru, Antoine Paquin
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Patent number: 8351873Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: GrantFiled: March 14, 2012Date of Patent: January 8, 2013Assignee: Skyworks Solutions, Inc.Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Publication number: 20120171971Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: ApplicationFiled: March 14, 2012Publication date: July 5, 2012Applicant: SKYWORKS SOLUTIONS, INC.Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Patent number: 8140028Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: GrantFiled: May 8, 2008Date of Patent: March 20, 2012Assignee: Skyworks Solutions, Inc.Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Publication number: 20120033758Abstract: A method for controlling local oscillator (LO) feed-through in a direct transmitter includes detecting a signal level corresponding to LO feed-through in a radio frequency (RF) signal that is output by a direct transmitter. Responsive to detecting the signal level corresponding to LO feed-through, DC offset levels are modified for an in-phase (I) signal and/or a quadrature-phase (Q) signal in the direct transmitter.Type: ApplicationFiled: May 10, 2011Publication date: February 9, 2012Applicant: Skyworks Solutions, Inc.Inventors: Mark M. Cloutier, Tudor Lipan, Christian Cojocaru
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Patent number: 7941106Abstract: A method for controlling local oscillator (LO) feed-through in a direct transmitter includes detecting a signal level corresponding to LO feed-through in a radio frequency (RF) signal that is output by a direct transmitter. Responsive to detecting the signal level corresponding to LO feed-through, DC offset levels are modified for an in-phase (I) signal and/or a quadrature-phase (Q) signal in the direct transmitter.Type: GrantFiled: June 6, 2007Date of Patent: May 10, 2011Assignee: Skyworks Solutions, Inc.Inventors: Mark M. Cloutier, Tudor Lipan, Christian Cojocaru
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Publication number: 20080299916Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: ApplicationFiled: May 8, 2008Publication date: December 4, 2008Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Publication number: 20080280579Abstract: A method for controlling local oscillator (LO) feed-through in a direct transmitter includes detecting a signal level corresponding to LO feed-through in a radio frequency (RF) signal that is output by a direct transmitter. Responsive to detecting the signal level corresponding to LO feed-through, DC offset levels are modified for an in-phase (I) signal and/or a quadrature-phase (Q) signal in the direct transmitter.Type: ApplicationFiled: June 6, 2007Publication date: November 13, 2008Inventors: Mark M. Cloutier, Tudor Lipan, Christian Cojocaru
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Patent number: 7132901Abstract: According to an exemplary embodiment, a voltage controlled oscillator includes a PFET having a first gate terminal, a first source terminal, a first drain terminal, and a first body terminal, where the first source terminal is coupled to a bias voltage and the first body terminal is coupled to a first tuning voltage. The voltage controlled oscillator does not include a discrete varactor diode. The voltage controlled oscillator further includes an NFET having a second gate terminal, a second source terminal, a second drain terminal, and a second body terminal, where the second body terminal is coupled to a second tuning voltage. The first and second drain terminals drive an output of the voltage controlled oscillator, where a frequency of the output is responsive to a change in the first tuning voltage. The change in the first tuning voltage causes a change in source-to-body capacitance of the PFET.Type: GrantFiled: October 22, 2004Date of Patent: November 7, 2006Assignee: Skyworks Solutions, Inc.Inventor: Christian Cojocaru
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Publication number: 20060097798Abstract: According to an exemplary embodiment, a voltage controlled oscillator includes a PFET having a first gate terminal, a first source terminal, a first drain terminal, and a first body terminal, where the first source terminal is coupled to a bias voltage and the first body terminal is coupled to a first tuning voltage. The voltage controlled oscillator does not include a discrete varactor diode. The voltage controlled oscillator further includes an NFET having a second gate terminal, a second source terminal, a second drain terminal, and a second body terminal, where the second body terminal is coupled to a second tuning voltage. The first and second drain terminals drive an output of the voltage controlled oscillator, where a frequency of the output is responsive to a change in the first tuning voltage. The change in the first tuning voltage causes a change in source-to-body capacitance of the PFET.Type: ApplicationFiled: October 22, 2004Publication date: May 11, 2006Inventor: Christian Cojocaru
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Patent number: 6693464Abstract: A current mode logic (CML) circuit includes an emitter follower circuit, a CML gate, and a Schottky diode that is coupled between the emitter follower circuit and the CML gate. Methods and other systems are also provided.Type: GrantFiled: June 14, 2002Date of Patent: February 17, 2004Assignee: Skyworks Solutions, Inc.Inventor: Christian Cojocaru
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Publication number: 20030231031Abstract: A current mode logic (CML) circuit includes an emitter follower circuit, a CML gate, and a Schottky diode that is coupled between the emitter follower circuit and the CML gate. Methods and other systems are also provided.Type: ApplicationFiled: June 14, 2002Publication date: December 18, 2003Inventor: Christian Cojocaru
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Patent number: 6515553Abstract: PLL frequency synthesizers and their calibration techniques are described. The PLL frequency synthesizers are used to generate digital modulation of a carrier signal. A digital frequency divider in the feedback path of the loop has its division ratio controlled by a digital &Dgr;-&Sgr; modulator. The modulation of the carrier is achieved by applying a modulation signal to the input of the &Dgr;-&Sgr; modulator and to the input of the voltage-controlled oscillator of the PLL. The high frequency path and low frequency path of the modulation signal must be adjusted with respect to one another in order to obtain a good modulation. As the low frequency path can be accurately set, the calibration is performed only on the high frequency path. Digital calibration techniques for the high frequency path are described.Type: GrantFiled: July 28, 2000Date of Patent: February 4, 2003Assignee: Conexant Systems Inc.Inventors: Norman M. Filiol, Thomas A. D. Riley, Mark Miles Cloutier, Christian Cojocaru, Florinel G. Balteanu
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Patent number: 6339621Abstract: A One Bit Digital Quadrature Vector Modulator (DQVM) and a method of generating single sideband output signals are useful for a wide range of radio frequency, signal processing and wireless applications. The DQVM simplifies the necessary digital multiplication by using noise shaped one bit versions of both the baseband IB and QB signals to be modulated and the ILO and QLO modulating signals. The one bit DQVM enables a much faster digital implementation of the digital quadrature vector modulation function than can be achieved with conventional multi-bit digital techniques. In addition the single sideband upconversion of the DQVM achieves high suppression of the unwanted sideband by applying an offset to one of the low speed input samples. Digital vector modulators are an improvement over conventional analog vector modulators as they are not subject to the amplitude and phase matching problems inherent in analog vector modulators.Type: GrantFiled: August 17, 1998Date of Patent: January 15, 2002Assignee: Philsar Electronics, Inc.Inventors: Christian Cojocaru, Theodore Varelas, Mark Cloutier, Luc Lussier