Patents by Inventor Christian G. Van de Walle

Christian G. Van de Walle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8617407
    Abstract: Systems and methods may provide electrical contacts to an array of substantially vertically aligned nanorods. The nanorod array may be fabricated on top of a conducting layer that serves as a bottom contact to the nanorods. A top metal contact may be applied to a plurality of nanorods of the nanorod array. The contacts may allow I/V (current/voltage) characteristics of the nanorods to be measured.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: December 31, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Hantschel, Noble M. Johnson, Peter Kiesel, Christian G. Van de Walle, William S. Wong
  • Patent number: 7811692
    Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: October 12, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
  • Patent number: 7745272
    Abstract: A semiconductor device has a heterostructure including a first layer of semiconductor oxide material. A second layer of semiconductor oxide material is formed on the first layer of semiconductor oxide material such that a two dimensional electron gas builds up at an interface between the first and second materials. A passivation layer on the outer surface stabilizes the structure. The device also has a source contact and a drain contact.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: June 29, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Christian G. Van de Walle, Kiesel Peter, Oliver Schmidt
  • Patent number: 7569905
    Abstract: Systems and methods may provide electrical contacts to an array of substantially vertically aligned nanorods. The nanorod array may be fabricated on top of a conducting layer that serves as a bottom contact to the nanorods. A top metal contact may be applied to a plurality of nanorods of the nanorod array. The contacts may allow I/V (current/voltage) characteristics of the nanorods to be measured.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: August 4, 2009
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Hantschel, Noble M. Johnson, Peter Kiesel, Christian G. Van De Walle, William S. Wong
  • Publication number: 20090047558
    Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.
    Type: Application
    Filed: October 24, 2008
    Publication date: February 19, 2009
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
  • Publication number: 20090042333
    Abstract: A semiconductor device has a heterostructure including a first layer of semiconductor oxide material. A second layer of semiconductor oxide material is formed on the first layer of semiconductor oxide material such that a two dimensional electron gas builds up at an interface between the first and second materials. A passivation layer on the outer surface stabilizes the structure. The device also has a source contact and a drain contact.
    Type: Application
    Filed: August 27, 2008
    Publication date: February 12, 2009
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christian G. Van de Walle, Peter Kiesel, Oliver Schmidt
  • Patent number: 7459225
    Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: December 2, 2008
    Inventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
  • Publication number: 20080283854
    Abstract: A light emitting diode device layer structure including a p-type contact layer that contains at least some indium (In), wherein the p-type contact layer is a not-intentionally doped strained nitride contact layer.
    Type: Application
    Filed: May 1, 2008
    Publication date: November 20, 2008
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Michael Iza, Hirokuni Asamizu, Christian G. Van de Walle, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 7432526
    Abstract: A semiconductor device has a heterostructure including a first layer of semiconductor oxide material. A second layer of semiconductor oxide material is formed on the first layer of semiconductor oxide material such that a two dimensional electron gas builds up at an interface between the first and second materials. A passivation layer on the outer surface stabilizes the structure. The device also has a source contact and a drain contact.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: October 7, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Christian G. Van de Walle, Peter Kiesel, Oliver Schmidt
  • Publication number: 20080223514
    Abstract: Systems and methods may provide electrical contacts to an array of substantially vertically aligned nanorods. The nanorod array may be fabricated on top of a conducting layer that serves as a bottom contact to the nanorods. A top metal contact may be applied to a plurality of nanorods of the nanorod array. The contacts may allow I/V (current/voltage) characteristics of the nanorods to be measured.
    Type: Application
    Filed: April 28, 2008
    Publication date: September 18, 2008
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Thomas HANTSCHEL, Noble M. JOHNSON, Peter KIESEL, Christian G. VAN DE WALLE, William S. WONG
  • Patent number: 7202173
    Abstract: Systems and methods may provide electrical contacts to an array of substantially vertically aligned nanorods. The nanorod array may be fabricated on top of a conducting layer that serves as a bottom contact to the nanorods. A top metal contact may be applied to a plurality of nanorods of the nanorod array. The contacts may allow I/V (current/voltage) characteristics of the nanorods to be measured.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: April 10, 2007
    Assignee: Palo Alto Research Corporation Incorporated
    Inventors: Thomas Hantschel, Noble M. Johnson, Peter Kiesel, Christian G. Van De Walle, William S. Wong
  • Patent number: 7123637
    Abstract: A nitride-based laser diode structure utilizing a single GaN:Mg waveguide/cladding layer, in place of separate GaN:Mg waveguide and AlGaN:Mg cladding layers used in conventional nitride-based laser diode structures. When formed using an optimal thickness, the GaN:Mg layer produces an optical confinement that is comparable to or better than conventional structures. A thin AlGaN tunnel barrier layer is provided between the multiple quantum well and a lower portion of the GaN:Mg waveguide layer, which suppresses electron leakage without any significant decrease in optical confinement. A split-metal electrode is formed on the GaN:Mg upper waveguide structure to avoid absorption losses in the upper electrode metal. A pair of AlGaN:Si current blocking layer sections are located below the split-metal electrode sections, and separated by a gap located over the active region of the multiple quantum well.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: October 17, 2006
    Assignee: Xerox Corporation
    Inventors: Michael A. Kneissl, David P. Bour, Linda T. Romano, Christian G. Van de Walle
  • Patent number: 6990132
    Abstract: A nitride-based laser diode structure utilizing a metal-oxide (e.g., Indium-Tin-Oxide (ITO) or Zinc-Oxide (ZnO)) in place of p-doped AlGaN to form the upper cladding layer. An InGaN laser diode structure utilizes ITO upper cladding structure, with an SiO2 isolation structure formed on opposite sides of the ITO upper cladding structure to provide a lateral index step that is large enough to enable lateral single-mode operation. The lateral index step is further increased by slightly etching the GaN:Mg waveguide layer below the SiO2 isolation structure. An optional p-type current barrier layer (e.g., AlGaN:Mg having a thickness of approximately 20 nm) is formed between the InGaN-MQW region and a p-GaN upper waveguide layer to impede electron leakage from the InGaN-MQW region.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: January 24, 2006
    Assignee: Xerox Corporation
    Inventors: Michael A. Kneissl, Linda T. Romano, Christian G. Van de Walle
  • Publication number: 20040184496
    Abstract: A nitride-based laser diode structure utilizing a single GaN:Mg waveguide/cladding layer, in place of separate GaN:Mg waveguide and AlGaN:Mg cladding layers used in conventional nitride-based laser diode structures. When formed using an optimal thickness, the GaN:Mg layer produces an optical confinement that is comparable to or better than conventional structures. A thin AlGaN tunnel barrier layer is provided between the multiple quantum well and a lower portion of the GaN:Mg waveguide layer, which suppresses electron leakage without any significant decrease in optical confinement. A split-metal electrode is formed on the GaN:Mg upper waveguide structure to avoid absorption losses in the upper electrode metal. A pair of AlGaN:Si current blocking layer sections are located below the split-metal electrode sections, and separated by a gap located over the active region of the multiple quantum well.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Applicant: Xerox Corporation
    Inventors: Michael A. Kneissl, David P. Bour, Linda T. Romano, Christian G. Van de Walle
  • Publication number: 20040184497
    Abstract: A nitride-based laser diode structure utilizing a metal-oxide (e.g., Indium-Tin-Oxide (ITO) or Zinc-Oxide (ZnO)) in place of p-doped AlGaN to form the upper cladding layer. An InGaN laser diode structure utilizes ITO upper cladding structure, with an SiO2 isolation structure formed on opposite sides of the ITO upper cladding structure to provide a lateral index step that is large enough to enable lateral single-mode operation. The lateral index step is further increased by slightly etching the GaN:Mg waveguide layer below the SiO2 isolation structure. An optional p-type current barrier layer (e.g., AlGaN:Mg having a thickness of approximately 20 nm) is formed between the InGaN-MQW region and a p-GaN upper waveguide layer to impede electron leakage from the InGaN-MQW region.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Applicant: Xerox Corporation
    Inventors: Michael A. Kneissl, Linda T. Romano, Christian G. Van de Walle
  • Patent number: 6724013
    Abstract: A p-n tunnel junction between a p-type semiconductor layer and a n-type semiconductor layer provides current injection for an edge-emitting nitride based semiconductor laser structure. The amount of p-type material in the nitride based semiconductor laser structure can be minimized, with attendant advantages in electrical, thermal, and optical performance, and in fabrication.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: April 20, 2004
    Assignee: Xerox Corporation
    Inventors: Michael A. Kneissl, Peter Kiesel, Christian G. Van de Walle
  • Patent number: 6605832
    Abstract: The performance of nitride based diodes is currently limited by the resistivity of the ohmic contacts to the p-type GaN. The large value of the contact resistance contributes to a large voltage for device operation. This in turn causes device heating, making cw operation difficult and limiting the device lifetime. A layer of GaP or GaNP alloy between the GaN and the metal contact layer serves to bridge the energetic barrier between the GaN valence band and the metal Fermi level, thus enhancing the hole injection and reducing the contact resistance.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: August 12, 2003
    Assignee: Xerox Corporation
    Inventor: Christian G. Van De Walle
  • Publication number: 20030116767
    Abstract: A p-n tunnel junction between a p-type semiconductor layer and a n-type semiconductor layer provides current injection for an edge-emitting nitride based semiconductor laser structure. The amount of p-type material in the nitride based semiconductor laser structure can be minimized, with attendant advantages in electrical, thermal, and optical performance, and in fabrication.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Applicant: Xerox Corporation
    Inventors: Michael A. Kneissl, Peter Kiesel, Christian G. Van de Walle
  • Patent number: 6583449
    Abstract: A semiconductor device includes group III-V layers formed over a substrate. At least one of the group III-V layers is doped with a dopant. The dopant includes a first dopant and one of a second dopant and an isovalent impurity. The first dopant has a covalent radius different in size than the covalent radii of each of the second dopant and the isovalent impurity.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: June 24, 2003
    Assignee: Xerox Corporation
    Inventors: John E. Northrup, Christian G. Van de Walle
  • Patent number: 6570898
    Abstract: An index-guided buried heterostructure AlGaInN laser diode provides improved mode stability and low threshold current when compared to conventional ridge waveguide structures. A short period superlattice is used to allow adequate cladding layer thickness for confinement without cracking. The intensity of the light lost due to leakage is reduced by about 2 orders of magnitude with an accompanying improvement in the far-field radiation pattern when compared to conventional structures.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: May 27, 2003
    Assignee: Xerox Corporation
    Inventors: David P. Bour, Michael A. Kneissl, Linda T. Romano, Thomas L. Paoli, Christian G. Van de Walle