Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuity configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.

Abstract: A method for operating a charge pump having a variable switching frequency may include comparing a target minimum output voltage with an output voltage generated at an output of the charge pump and controlling switching of switches of the charge pump based on the comparison such that the variable switching frequency varies as an output current driven by the charge pump varies.

Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.

Abstract: A method for calculating a calibration gain used for common-mode rejection in a current sensing system may include measuring a first value of a common-mode voltage associated with the current sensing system and a first output value of the current sensing system occurring at the first value of the common-mode voltage, measuring a second value of the common-mode voltage associated with the current sensing system and a second output value of the current sensing system occurring at the second value of the common-mode voltage, and based on a difference between the second output value of the current sensing system and the first output value of the current sensing system and a difference between the second value of the common-mode voltage and the first value of the common-mode voltage, calculating the calibration gain.

Abstract: A method for enforcing design rules in a circuit layout may include providing a circuit schematic for an integrated circuit to a circuit simulator, wherein the circuit layout is derived from a circuit schematic, using the circuit simulator to simulate the circuit schematic and generate simulated electrical parameters for the integrated circuit, and using the simulated electrical parameters to enforce physical design rules when generating the circuit layout based on the simulated electrical parameters.

Abstract: A power converter may include an input for receiving an input signal and output for generating an intermediate signal that is a power converted signal from the input signal wherein the intermediate signal is determined based on various parameters of a signal path that utilizes the intermediate signal, wherein the various parameters comprise one or more of the following: a peak output signal of the signal path, energy requested over a period of time by the signal path, available energy from an energy source to the power converter, stored energy at an output of the power converter, and stored energy of a battery for providing electrical energy at the input.

Abstract: A system may include a charge pump configured to transfer electrical energy from a source of electrical energy coupled to an input of the charge pump to an energy storage device coupled to an output of the charge pump and configured to store the electrical energy transferred from the source of electrical energy, a power converter configured to transfer electrical energy from the energy storage device to an output of the power converter, wherein the power converter comprises a first plurality of switches and a power inductor arranged such that one switch of the first plurality of switches is coupled between the power inductor and the output of the charge pump, an output stage configured to transfer electrical energy between the output of the power converter to a load coupled to an output of the output stage, the output stage comprising a second plurality of switches, and a controller configured to generate an output voltage at the output of the output stage as an amplified version of an input signal.

Abstract: A specialized, dispersion-controlled fiber is particularly configured to exhibit a relatively uniform dispersion (D) over a broad spectral range (for example, 1000 nm to 2000 nm). The specialized fiber exhibits an essentially constant attenuation (?) over this same spectral range so that the fiber is defined as having a high “figure of merit” (FoM) where FoM is defined as |D|/?. The specialized fiber is well-suited for use as a pulse stretcher, providing the ability to separate out wavelength constituents of an extremely short (fs, ps) broadband pulse into the ns range, for example.

Abstract: A dual-gate metal-oxide-semiconductor field-effect transistor (MOSFET) may include a MOSFET having a channel region, a drain, and a source, a first gate formed proximate to the channel region, a drain extension region formed proximate to the drain, and a second gate formed proximate to the drain extension region.

Abstract: A system may include a charge pump configured to operate in a plurality of modes including a first mode in which the ratio of an output voltage to an input voltage of the charge pump is a first ratio and a second mode in which the ratio is a second ratio and a controller configured to limit current flowing between a power source of the charge pump to the charge pump, wherein the power source provides the input voltage, by limiting a transfer of charge between the power source and the charge pump during a switching cycle of the charge pump responsive to a change in operation between modes of the plurality of modes.

Abstract: A method for calculating a calibration gain used for common-mode rejection in a current sensing system may include measuring a first value of a common-mode voltage associated with the current sensing system and a first output value of the current sensing system occurring at the first value of the common-mode voltage, measuring a second value of the common-mode voltage associated with the current sensing system and a second output value of the current sensing system occurring at the second value of the common-mode voltage, and based on a difference between the second output value of the current sensing system and the first output value of the current sensing system and a difference between the second value of the common-mode voltage and the first value of the common-mode voltage, calculating the calibration gain.

Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.

Abstract: The disclosed computer-implemented method for generating training documents used by classification algorithms may include (i) identifying a set of training documents used by a classification system to classify documents written in a first language, (ii) generating a list of tokens from within the training documents that indicate critical terms representative of classes defined by the classification system, (iii) translating the list of tokens from the first language to a second language, (iv) creating, based on the translated tokens, a set of simulated training documents that enables the classification system to classify documents written in the second language, and (v) classifying an additional document written in the second language based on the set of simulated training documents. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.

Abstract: A porous ceramic substrate for use as a particle filter, with a porosity of at least 50%, which includes a non-uniform coating layer of an oxide component in contact with a surface of the ceramic substrate, which oxide component is distributed on the surface and in dead-end pores of the ceramic substrate and creates the non-uniform coating layer on the substrate support, wherein the coating layer has a substantially smooth surface. Such substrate is typically a particle filter or part of a particle filter, e.g. a DPF.

Abstract: A dual-gate metal-oxide-semiconductor field-effect transistor (MOSFET) may include a MOSFET having a channel region, a drain, and a source, a first gate formed proximate to the channel region, a drain extension region formed proximate to the drain, and a second gate formed proximate to the drain extension region.

Abstract: In accordance with embodiments of the present disclosure, a system for power conversion may include a power converter comprising a power inductor and a switch coupled to the power inductor and a predriver system for electrically driving a gate of the switch, the predriver system configured to operate in a plurality of modes including a high-power mode in which the predriver system is supplied with electrical energy from a first power supply having a first supply voltage and a low-power mode in which the predriver system is supplied with electrical energy from a second power supply having a second supply voltage significantly lesser than the first supply voltage.

Abstract: A distributed network system may include a shared communication bus that operates in accordance with a communication protocol and a plurality of devices coupled to the shared communication bus. The communication protocol may define periods of time and an order by which each of the plurality of devices actively transmit data on the shared communication bus such that only one of the plurality of devices actively transmits data on the shared communication bus at a time to a remaining number of the plurality of devices through the shared communication bus. When the remaining number of the plurality of devices are not actively transmitting data, the remaining number of the plurality of devices may receive data via the shared communication bus so that bi-directional communication is established among the plurality of devices on the shared communication bus.

Abstract: In accordance with embodiments of the present disclosure, a system may have a configurable control loop technology, wherein the system comprises a first mode control loop, a second mode control loop and a reconfigurable pulse width modulator (PWM) configured to generate an output signal from an input signal. The reconfigurable PWM may include a digital PWM and an analog PWM and may be configured such that when the first mode control loop is activated, the reconfigurable PWM utilizes the analog PWM to generate the output signal from the input signal and when the second mode control loop is activated, the reconfigurable PWM utilizes the digital PWM to generate the output signal from the input signal and the digital PWM receives its input from a digital proportional integral derivative controller.

Abstract: A system may include a charge pump configured to transfer electrical energy from a source of electrical energy coupled to an input of the charge pump to an energy storage device coupled to an output of the charge pump and configured to store the electrical energy transferred from the source of electrical energy, a power converter configured to transfer electrical energy from the energy storage device to an output of the power converter, wherein the power converter comprises a first plurality of switches and a power inductor arranged such that one switch of the first plurality of switches is coupled between the power inductor and the output of the charge pump, an output stage configured to transfer electrical energy between the output of the power converter to a load coupled to an output of the output stage, the output stage comprising a second plurality of switches, and a controller configured to generate an output voltage at the output of the output stage as an amplified version of an input signal.