Abstract: A trench transistor. The transistor including: a semiconductor region, a trench structure formed in the semiconductor region; a gate insulation layer and an electrically conductive gate layer formed on the gate insulation layer in the trench structure, and a gate contact, which is electrically conductively connected to the gate layer in an edge area of the trench transistor. A thickness of the gate insulation layer in the edge area of the trench transistor is greater than in an active area of the trench transistor.

Abstract: A method for producing a substrate for a metal-oxide-semiconductor field-effect transistor or a micro-electromechanical system includes dry etching a preliminary trench into the substrate by using a structured first masking layer. The substrate includes a silicon carbide layer, and the dry etching is carried out in such a way that a remnant of the first structured masking layer remains. The method further includes applying a second masking layer at least to walls of the preliminary trench and dry etching by using the remnant of the first masking layer and the second masking layer so as to produce a trench with a step in the trench.

Abstract: A transistor, including a substrate of a first doping type; an epitaxy layer of the first doping type above the substrate; a channel layer of a second doping type, differing from the first doping type, above the epitaxy layer; a plurality of trenches in the channel layer, which have a gate electrode situated below the trenches and are bordered by a source terminal of the first doping type above the channel layer; a plurality of shielding areas of the second doping type, which are situated below the gate electrode. The shielding areas are guided below the trenches together in a interconnection of shielding areas, and several shielding areas are jointly guided to terminals for contacting the shielding areas.

Abstract: A transistor, including a substrate of a first doping type; an epitaxy layer of the first doping type above the substrate; a channel layer of a second doping type, differing from the first doping type, above the epitaxy layer; a plurality of trenches in the channel layer, which have a gate electrode situated below the trenches and are bordered by a source terminal of the first doping type above the channel layer; a plurality of shielding areas of the second doping type, which are situated below the gate electrode. The shielding areas are guided below the trenches together in a interconnection of shielding areas, and several shielding areas are jointly guided to terminals for contacting the shielding areas.

Abstract: A substrate includes a trench with walls and a base. The substrate also includes a dielectric field plate. The dielectric field plate consists of at least one first dielectric layer, which only adjoins lower sections of the walls of the trench and the base of the trench. Parasitic capacitances can be reduced when using this substrate for power transistors.

Abstract: A substrate includes a trench with walls and a base. The substrate also includes a dielectric field plate. The dielectric field plate consists of at least one first dielectric layer, which only adjoins lower sections of the walls of the trench and the base of the trench. Parasitic capacitances can be reduced when using this substrate for power transistors.

Abstract: A method for producing a substrate for a metal-oxide-semiconductor field-effect transistor or a micro-electromechanical system includes dry etching a preliminary trench into the substrate by using a structured first masking layer. The substrate includes a silicon carbide layer, and the dry etching is carried out in such a way that a remnant of the first structured masking layer remains. The method further includes applying a second masking layer at least to walls of the preliminary trench and dry etching by using the remnant of the first masking layer and the second masking layer so as to produce a trench with a step in the trench.