Patents by Inventor Christie Marrian
Christie Marrian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10147877Abstract: In fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode, the oxide layer comprising an oxygen deficiency and/or defects therein. A second electrode is then provided on the oxide layer.Type: GrantFiled: September 7, 2016Date of Patent: December 4, 2018Assignee: Cypress Semiconductor CorporationInventors: Matthew Buynoski, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
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Publication number: 20160380195Abstract: In fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode, the oxide layer comprising an oxygen deficiency and/or defects therein. A second electrode is then provided on the oxide layer.Type: ApplicationFiled: September 7, 2016Publication date: December 29, 2016Inventors: Matthew BUYNOSKI, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
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Patent number: 9461247Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is then formed on the layer.Type: GrantFiled: February 2, 2015Date of Patent: October 4, 2016Assignee: Cypress Semiconductor CorporationInventors: Matthew Buynoski, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
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Patent number: 9343666Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.Type: GrantFiled: June 21, 2012Date of Patent: May 17, 2016Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael Vanbuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffery A. Shields
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Patent number: 9274410Abstract: Methods and systems for generating masks for spacer formation are disclosed. As a part of a disclosed method, a predefined final wafer pattern is accessed, areas related to features in the predefined final wafer pattern are identified and a template mask is formed based on the identified areas for forming spacers on a wafer. Subsequently, a mask is formed for use in the removal of portions of the spacers to form an on wafer pattern that corresponds to the predefined final wafer pattern.Type: GrantFiled: February 5, 2010Date of Patent: March 1, 2016Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Wai Lo, Todd Lukanc, Christie Marrian
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Publication number: 20150144857Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is the formed on the layer.Type: ApplicationFiled: February 2, 2015Publication date: May 28, 2015Inventors: Matthew BUYNOSKI, Seungmoo CHOI, Chakravarthy GOPALAN, Dongxiang LIAO, Christie MARRIAN
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Patent number: 9012299Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.Type: GrantFiled: August 14, 2014Date of Patent: April 21, 2015Assignee: Spansion LLCInventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dong-Xiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
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Patent number: 8946020Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is then formed on the layer.Type: GrantFiled: September 6, 2007Date of Patent: February 3, 2015Assignee: Spansion, LLCInventors: Matthew Buynoski, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
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Publication number: 20140357044Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. in alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.Type: ApplicationFiled: August 14, 2014Publication date: December 4, 2014Inventors: Steven AVANZINO, Tzu-Ning FANG, Swaroop KAZA, Dong-Xiang LIAO, Wai LO, Christie MARRIAN, Sameer HADDAD
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Patent number: 8828837Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.Type: GrantFiled: April 19, 2013Date of Patent: September 9, 2014Assignee: Spansion LLCInventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
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Publication number: 20130237030Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.Type: ApplicationFiled: April 19, 2013Publication date: September 12, 2013Applicant: Spansion LLCInventors: Steven AVANZINO, Tzu-Ning FANG, Swaroop KAZA, Dongxiang LIAO, Wai LO, Christie MARRIAN, Sameer HADDAD
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Patent number: 8445913Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.Type: GrantFiled: October 30, 2007Date of Patent: May 21, 2013Assignee: Spansion LLCInventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
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Publication number: 20120276706Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer;, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body Filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.Type: ApplicationFiled: June 21, 2012Publication date: November 1, 2012Inventors: Suzette K. PANGRLE, Steven AVANZINO, Sameer HADDAD, Michael VANBUSKIRK, Manuj RATHOR, James XIE, Kevin SONG, Christie MARRIAN, Bryan CHOO, Fei WANG, Jeffery A. SHIELDS
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Patent number: 8232175Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.Type: GrantFiled: September 14, 2006Date of Patent: July 31, 2012Assignee: Spansion LLCInventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffrey A. Shields
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Patent number: 8089113Abstract: The present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening in the dielectric layer, providing a switching body in the opening, and providing a second conductive body in the opening.Type: GrantFiled: December 5, 2006Date of Patent: January 3, 2012Assignee: Spansion LLCInventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffrey A. Shields
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Publication number: 20110195348Abstract: Methods and systems for generating masks for spacer formation are disclosed. As a part of a disclosed method, a predefined final wafer pattern is accessed, areas related to features in the predefined final wafer pattern are identified and a template mask is formed based on the identified areas for forming spacers on a wafer. Subsequently, a mask is formed for use in the removal of portions of the spacers to form an on wafer pattern that corresponds to the predefined final wafer pattern.Type: ApplicationFiled: February 5, 2010Publication date: August 11, 2011Inventors: Wai Lo, Todd Lukanc, Christie Marrian
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Patent number: 7916529Abstract: A memory architecture that employs one or more semiconductor PIN diodes is provided. The memory employs a substrate that includes a buried bit/word line and a PIN diode. The PIN diode includes a non-intrinsic semiconductor region, a portion of the bit/word line, and an intrinsic semiconductor region positioned between the non-intrinsic region and the portion of the bit/word line.Type: GrantFiled: February 13, 2009Date of Patent: March 29, 2011Assignee: Spansion LLCInventors: Wai Lo, Christie Marrian, Tzu-Ning Fang, Sameer Haddad
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Publication number: 20100208517Abstract: A memory architecture that employs one or more semiconductor PIN diodes is provided. The memory employs a substrate that includes a buried bit/word line and a PIN diode. The PIN diode includes a non-intrinsic semiconductor region, a portion of the bit/word line, and an intrinsic semiconductor region positioned between the non-intrinsic region and the portion of the bit/word line.Type: ApplicationFiled: February 13, 2009Publication date: August 19, 2010Applicant: Spansion LLCInventors: Wai Lo, Christie Marrian, Tzu-Ning Fang, Sameer Haddad
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Patent number: 7706168Abstract: The present method provides annealing of a resistive memory device so as to provide that the device in its erased state has a greatly increased resistance as compared to a prior art approach. The annealing also provides that the device may be erased by application of any of a plurality of electrical potentials within an increased range of electrical potentials as compared to the prior art.Type: GrantFiled: October 30, 2007Date of Patent: April 27, 2010Assignee: Spansion LLCInventors: Tzu-Ning Fang, Steven Avanzino, Swaroop Kaza, Dongxiang Liao, Christie Marrian, Sameer Haddad
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Publication number: 20090109598Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.Type: ApplicationFiled: October 30, 2007Publication date: April 30, 2009Inventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad