Patents by Inventor Christie Marrian

Christie Marrian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10147877
    Abstract: In fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode, the oxide layer comprising an oxygen deficiency and/or defects therein. A second electrode is then provided on the oxide layer.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: December 4, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Matthew Buynoski, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
  • Publication number: 20160380195
    Abstract: In fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. An oxide layer is provided on the first electrode, the oxide layer comprising an oxygen deficiency and/or defects therein. A second electrode is then provided on the oxide layer.
    Type: Application
    Filed: September 7, 2016
    Publication date: December 29, 2016
    Inventors: Matthew BUYNOSKI, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
  • Patent number: 9461247
    Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is then formed on the layer.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: October 4, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Matthew Buynoski, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
  • Patent number: 9343666
    Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: May 17, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael Vanbuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffery A. Shields
  • Patent number: 9274410
    Abstract: Methods and systems for generating masks for spacer formation are disclosed. As a part of a disclosed method, a predefined final wafer pattern is accessed, areas related to features in the predefined final wafer pattern are identified and a template mask is formed based on the identified areas for forming spacers on a wafer. Subsequently, a mask is formed for use in the removal of portions of the spacers to form an on wafer pattern that corresponds to the predefined final wafer pattern.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: March 1, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Wai Lo, Todd Lukanc, Christie Marrian
  • Publication number: 20150144857
    Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is the formed on the layer.
    Type: Application
    Filed: February 2, 2015
    Publication date: May 28, 2015
    Inventors: Matthew BUYNOSKI, Seungmoo CHOI, Chakravarthy GOPALAN, Dongxiang LIAO, Christie MARRIAN
  • Patent number: 9012299
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: April 21, 2015
    Assignee: Spansion LLC
    Inventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dong-Xiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
  • Patent number: 8946020
    Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is then formed on the layer.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: February 3, 2015
    Assignee: Spansion, LLC
    Inventors: Matthew Buynoski, Seungmoo Choi, Chakravarthy Gopalan, Dongxiang Liao, Christie Marrian
  • Publication number: 20140357044
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. in alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Application
    Filed: August 14, 2014
    Publication date: December 4, 2014
    Inventors: Steven AVANZINO, Tzu-Ning FANG, Swaroop KAZA, Dong-Xiang LIAO, Wai LO, Christie MARRIAN, Sameer HADDAD
  • Patent number: 8828837
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: September 9, 2014
    Assignee: Spansion LLC
    Inventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
  • Publication number: 20130237030
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 12, 2013
    Applicant: Spansion LLC
    Inventors: Steven AVANZINO, Tzu-Ning FANG, Swaroop KAZA, Dongxiang LIAO, Wai LO, Christie MARRIAN, Sameer HADDAD
  • Patent number: 8445913
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: May 21, 2013
    Assignee: Spansion LLC
    Inventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad
  • Publication number: 20120276706
    Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer;, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body Filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.
    Type: Application
    Filed: June 21, 2012
    Publication date: November 1, 2012
    Inventors: Suzette K. PANGRLE, Steven AVANZINO, Sameer HADDAD, Michael VANBUSKIRK, Manuj RATHOR, James XIE, Kevin SONG, Christie MARRIAN, Bryan CHOO, Fei WANG, Jeffery A. SHIELDS
  • Patent number: 8232175
    Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: July 31, 2012
    Assignee: Spansion LLC
    Inventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffrey A. Shields
  • Patent number: 8089113
    Abstract: The present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening in the dielectric layer, providing a switching body in the opening, and providing a second conductive body in the opening.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: January 3, 2012
    Assignee: Spansion LLC
    Inventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffrey A. Shields
  • Publication number: 20110195348
    Abstract: Methods and systems for generating masks for spacer formation are disclosed. As a part of a disclosed method, a predefined final wafer pattern is accessed, areas related to features in the predefined final wafer pattern are identified and a template mask is formed based on the identified areas for forming spacers on a wafer. Subsequently, a mask is formed for use in the removal of portions of the spacers to form an on wafer pattern that corresponds to the predefined final wafer pattern.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Inventors: Wai Lo, Todd Lukanc, Christie Marrian
  • Patent number: 7916529
    Abstract: A memory architecture that employs one or more semiconductor PIN diodes is provided. The memory employs a substrate that includes a buried bit/word line and a PIN diode. The PIN diode includes a non-intrinsic semiconductor region, a portion of the bit/word line, and an intrinsic semiconductor region positioned between the non-intrinsic region and the portion of the bit/word line.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: March 29, 2011
    Assignee: Spansion LLC
    Inventors: Wai Lo, Christie Marrian, Tzu-Ning Fang, Sameer Haddad
  • Publication number: 20100208517
    Abstract: A memory architecture that employs one or more semiconductor PIN diodes is provided. The memory employs a substrate that includes a buried bit/word line and a PIN diode. The PIN diode includes a non-intrinsic semiconductor region, a portion of the bit/word line, and an intrinsic semiconductor region positioned between the non-intrinsic region and the portion of the bit/word line.
    Type: Application
    Filed: February 13, 2009
    Publication date: August 19, 2010
    Applicant: Spansion LLC
    Inventors: Wai Lo, Christie Marrian, Tzu-Ning Fang, Sameer Haddad
  • Patent number: 7706168
    Abstract: The present method provides annealing of a resistive memory device so as to provide that the device in its erased state has a greatly increased resistance as compared to a prior art approach. The annealing also provides that the device may be erased by application of any of a plurality of electrical potentials within an increased range of electrical potentials as compared to the prior art.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: April 27, 2010
    Assignee: Spansion LLC
    Inventors: Tzu-Ning Fang, Steven Avanzino, Swaroop Kaza, Dongxiang Liao, Christie Marrian, Sameer Haddad
  • Publication number: 20090109598
    Abstract: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Inventors: Steven Avanzino, Tzu-Ning Fang, Swaroop Kaza, Dongxiang Liao, Wai Lo, Christie Marrian, Sameer Haddad