Abstract: Embodiments provide a method for manufacturing a microelectronic arrangement. The method includes a step of providing a chip-film module with a semiconductor chip and a film substrate having arranged thereon the semiconductor chip, wherein the chip-film module includes at least one coupling element spaced apart from the semiconductor chip and electrically coupled to at least one terminal of the semiconductor chip. Furthermore, the method includes a step of embedding the chip-film module into a printed circuit board, wherein, in embedding the chip-film module into the printed circuit board, the at least one coupling element of the chip-film module is coupled vertically [e.g. in the vertical direction [e.g. in relation to the printed circuit board]] [e.g. perpendicular to a surface of the printed circuit board] to at least one coupling counter element of the printed circuit board.

Abstract: The invention relates to a multi-layer 3D foil package and to a method for manufacturing such a multi-layer 3D foil package. The 3D foil package has a foil substrate stack having at least two foil planes, wherein a first electrically insulating foil substrate is arranged in a first foil plane, and wherein a second electrically insulating foil substrate is arranged in a second foil plane, wherein the first foil substrate has a first main surface region on which at least one functional electronic component is arranged, wherein the second foil substrate has a cavity having at least one opening in the second main surface region, wherein the foil substrates within the foil substrate stack are arranged one above the other such that the functional electronic component arranged on the first foil substrate is arranged within the cavity provided in the second foil substrate.

Abstract: Embodiments provide a method for manufacturing a microelectronic arrangement. The method includes a step of providing a chip-film module with a semiconductor chip and a film substrate having arranged thereon the semiconductor chip, wherein the chip-film module includes at least one coupling element spaced apart from the semiconductor chip and electrically coupled to at least one terminal of the semiconductor chip. Furthermore, the method includes a step of embedding the chip-film module into a printed circuit board, wherein, in embedding the chip-film module into the printed circuit board, the at least one coupling element of the chip-film module is coupled vertically [e.g. in the vertical direction [e.g. in relation to the printed circuit board]] [e.g.

Abstract: An antenna module Includes a first substrate, a second substrate, the second substrate including at least one cavity at one of the first main surface. The first substrate includes at feast an RF antenna element and/or an RF chip and/or an RF conductive trace, which are arranged on the first main surface of the substrate. The first substrate is connected, with its first main surface, to the first main surface of the second substrate so that the RF elements project into the at least one cavity.

Abstract: The invention relates to a multi-layer 3D foil package and to a method for manufacturing such a multi-layer 3D foil package. The 3D foil package has a foil substrate stack having at least two foil planes, wherein a first electrically insulating foil substrate is arranged in a first foil plane, and wherein a second electrically insulating foil substrate is arranged in a second foil plane, wherein the first foil substrate has a first main surface region on which at least one functional electronic component is arranged, wherein the second foil substrate has a cavity having at least one opening in the second main surface region, wherein the foil substrates within the foil substrate stack are arranged one above the other such that the functional electronic component arranged on the first foil substrate is arranged within the cavity provided in the second foil substrate.

Abstract: A method for manufacturing a semiconductor device package includes providing an electrically insulating film having film terminal contacts on a surface thereof, and an opening therethrough. A semiconductor device arrangement at least including a carrier element having arranged thereon a projecting element and element terminal contacts is deposited on the film, wherein the projecting element is introduced into the opening and the element terminal contacts are arranged in contact with the film terminal contacts. The planarization layer is deposited over the carrier element and the film.

Abstract: The invention relates to an apparatus for electrostatic coupling of a substrate with a substrate carrier, wherein the apparatus includes a flexible plastic carrier film on which an electrically contactable electrode structure is unilaterally deposited, and a cover layer which can be brought into contact with the electrode structure on the side of the electrode structure facing away from the carrier film, wherein the apparatus is configured such that, in a coupled state, the same is arranged at least in sections between the substrate and the substrate carrier and, in a non-coupled state, the same can be removed from the substrate carrier in a reusable manner.

Abstract: A method for manufacturing a semiconductor device package includes providing an electrically insulating film having film terminal contacts on a surface thereof, and an opening therethrough. A semiconductor device arrangement at least including a carrier element having arranged thereon a projecting element and element terminal contacts is deposited on the film, wherein the projecting element is introduced into the opening and the element terminal contacts are arranged in contact with the film terminal contacts. The planarization layer is deposited over the carrier element and the film.

Abstract: Carrier wafers are used to hold thin and ultra-thin substrates such as semiconductor components, for example. The carrier wafer of the invention has a plurality of electrodes insulated on all sides (floating electrodes). This plurality of floating electrodes, but at least 50 floating electrodes, are located next to one another with reference to the plane of the first surface of the carrier wafer. Each of these floating electrodes can be charged, for example by means of Fowler-Nordheim tunnels or by the injection of hot charge carriers, in particular of hot electrons or hot holes. Also provided are a method for holding a flexible substrate by means of a carrier wafer of this type and a method for the manufacture of a carrier wafer of this type.

Abstract: The invention relates to an apparatus for electrostatic coupling of a substrate with a substrate carrier, wherein the apparatus includes a flexible plastic carrier film on which an electrically contactable electrode structure is unilaterally deposited, and a cover layer which can be brought into contact with the electrode structure on the side of the electrode structure facing away from the carrier film, wherein the apparatus is configured such that, in a coupled state, the same is arranged at least in sections between the substrate and the substrate carrier and, in a non-coupled state, the same can be removed from the substrate carrier in a reusable manner.

Abstract: The invention relates to a method in which a layer compound having a substrate having an adhesive layer applied thereon at least in regions is provided. An opening extending through the substrate and through the adhesive layer is introduced therein in order to obtain a patterned layer compound. A microchip having an active region arranged on the outside of the chip is provided, wherein the active region is a sensor area or a radiation coupling-out area. In addition, in accordance with the invention, the microchip is arranged on the adhesive layer of the patterned layer compound such that the active region is exposed through the opening.

Abstract: Carrier wafers are used to hold thin and ultra-thin substrates such as semiconductor components, for example. The carrier wafer of the invention has a plurality of electrodes insulated on all sides (floating electrodes). This plurality of floating electrodes, but at least 50 floating electrodes, are located next to one another with reference to the plane of the first surface of the carrier wafer. Each of these floating electrodes can be charged, for example by means of Fowler-Nordheim tunnels or by the injection of hot charge carriers, in particular of hot electrons or hot holes. Also provided are a method for holding a flexible substrate by means of a carrier wafer of this type and a method for the manufacture of a carrier wafer of this type.

Abstract: A carrier substrate for supporting a substrate structure having a process substrate and a frame structure has a base portion and a support portion. The support portion is arranged on the base portion. The support portion and the base portion form a recess region for receiving the frame structure of the substrate structure. The support portion has a support surface area for supporting the process substrate of the substrate structure.

Abstract: A method of producing a chip package includes providing a substrate comprising a first recess having a recess bottom and recess side walls. A chip comprising a chip backside is introduced into the recess such that the chip does not protrude from the recess and such that a gap remains between the recess side walls and the chip, the chip backside being attached to the recess bottom. The gap is filled with a filler material.

Abstract: The present invention provides a method for producing integrated circuits which are mechanically flexible and can be provided contiguously on a common flexible carrier substrate. The method includes a step of continuously providing a first flexible substrate which has conductor-line patterns, and a step of mounting the integrated circuits on the first flexible substrate and connecting the integrated circuits to the conductor-line patterns of the first flexible substrate, and a step of covering the circuits mounted on the first flexible substrate with a second flexible substrate, recesses being provided in the first or second flexible substrates in order to make the conductor-line patterns of the first flexible substrate accessible.

Abstract: A method of producing a chip package includes providing a substrate comprising a first recess having a recess bottom and recess side walls. A chip comprising a chip backside is introduced into the recess such that the chip does not protrude from the recess and such that a gap remains between the recess side walls and the chip, the chip backside being attached to the recess bottom. The gap is filled with a filler material.

Abstract: The present invention provides a method for producing integrated circuits which are mechanically flexible and can be provided contiguously on a common flexible carrier substrate. The method includes a step of continuously providing a first flexible substrate which has conductor-line patterns, and a step of mounting the integrated circuits on the first flexible substrate and connecting the integrated circuits to the conductor-line patterns of the first flexible substrate, and a step of covering the circuits mounted on the first flexible substrate with a second flexible substrate, recesses being provided in the first or second flexible substrates in order to make the conductor-line patterns of the first flexible substrate accessible.

Abstract: Method for handling a substrate with polarizable molecules including providing a carrier with a first junction electrode and disposing the substrate between the first junction electrode and a second junction electrode. Fixing the substrate on the carrier is achieved by applying a voltage between the first junction electrode and the second junction electrode, so that the polarizable molecules are polarized. After removing the second junction electrode, the substrate remains fixed on the carrier.

Abstract: The present invention relates to a method for the selective coating of a surface of a substrate with liquid, wherein the surface to be selectively coated with liquid comprises regions exhibiting different surface energies, and wherein prior to wetting a fluorine-containing plasma gas is directly acting on the regions exhibiting different surface energies.

Abstract: Method for handling a substrate with polarizable molecules including providing a carrier with a first junction electrode and disposing the substrate between the first junction electrode and a second junction electrode. Fixing the substrate on the carrier is achieved by applying a voltage between the first junction electrode and the second junction electrode, so that the polarizable molecules are polarized. After removing the second junction electrode, the substrate remains fixed on the carrier.