Patents by Inventor Christoph Andreas Othmar DIRNECKER

Christoph Andreas Othmar DIRNECKER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11676993
    Abstract: In one example an electronic device includes a first resistor and a second resistor. The first resistor includes a first resistive layer located over a substrate, the first resistive layer having a first sheet resistance. The second resistor includes a first portion of a second resistive layer located over the substrate, the second resistive layer having a second sheet resistance different from the first sheet resistance. The first resistive layer is located between the substrate and a second noncontiguous portion of the second resistive layer.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: June 13, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Publication number: 20200403061
    Abstract: In one example an electronic device includes a first resistor and a second resistor. The first resistor includes a first resistive layer located over a substrate, the first resistive layer having a first sheet resistance. The second resistor includes a first portion of a second resistive layer located over the substrate, the second resistive layer having a second sheet resistance different from the first sheet resistance. The first resistive layer is located between the substrate and a second noncontiguous portion of the second resistive layer.
    Type: Application
    Filed: September 8, 2020
    Publication date: December 24, 2020
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Patent number: 10770538
    Abstract: A method of forming an electronic device includes forming an opening through a dielectric layer located over a first resistive layer, the first resistive layer having a first sheet resistance. A second resistive layer is deposited over the dielectric layer and into the opening. The second resistive layer has a second sheet resistance different from the first sheet resistance. A portion of the second resistive layer is removed, thereby forming first and second noncontiguous portions of the second resistive layer, wherein the second portion of the second resistive layer contacts the first resistive layer.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: September 8, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Publication number: 20180261664
    Abstract: An electronic device includes a first resistor and a second resistor. The first resistor includes a first resistive layer located over a substrate and having a first sheet resistance. The second resistor includes a first portion of a second resistive layer located over the substrate and having a second sheet resistance that is different from the first sheet resistance. The first resistive layer is located between the substrate and a second noncontiguous portion of the second resistive layer.
    Type: Application
    Filed: May 10, 2018
    Publication date: September 13, 2018
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Patent number: 9991329
    Abstract: An integrated circuit includes a higher sheet resistance resistor and a lower sheet resistance resistor, disposed in a same level of dielectric layers of the integrated circuit. The higher sheet resistor has a body region and head regions in a higher sheet resistance layer. The lower sheet resistor has a body region and head regions in a lower sheet resistance layer, which is thicker than the higher sheet layer. The higher sheet resistor has an upper head layer contacting the higher sheet layer at each head region of the higher sheet layer. Each upper head layer has a same composition and thickness as the lower sheet layer of the lower sheet resistor. The lower sheet resistor is free of head layers over the lower sheet resistance layer.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: June 5, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Publication number: 20180019297
    Abstract: An integrated circuit includes a higher sheet resistance resistor and a lower sheet resistance resistor, disposed in a same level of dielectric layers of the integrated circuit. The higher sheet resistor has a body region and head regions in a higher sheet resistance layer. The lower sheet resistor has a body region and head regions in a lower sheet resistance layer, which is thicker than the higher sheet layer. The higher sheet resistor has an upper head layer contacting the higher sheet layer at each head region of the higher sheet layer. Each upper head layer has a same composition and thickness as the lower sheet layer of the lower sheet resistor. The lower sheet resistor is free of head layers over the lower sheet resistance layer.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 18, 2018
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Patent number: 9190462
    Abstract: The invention relates to a semiconductor device and a method of manufacturing an electronic device. A first conductive layer (first metal interconnect layer) is deposited. There is an insulating layer (first intermetal dielectric) layer deposited. A resistive layer is deposited on top of the insulating layer and structured in order to serve as a thin film resistor. A second insulating layer (second intermetal dielectric) is then deposited on top of the resistive layer. A first opening is etched into the insulating layers (first and second intermetal dielectric) down to the first conductive layer. A second opening is etched into the insulating layers (first and second intermetal dielectrics) down to the first conductive layer. A cross-sectional plane of the second opening is arranged such that it at least partially overlaps the resistive layer of the thin film resistor in a first direction.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: November 17, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christoph Andreas Othmar Dirnecker, Leif Christian Olsen
  • Publication number: 20150008560
    Abstract: The invention relates to a semiconductor device and a method of manufacturing an electronic device. A first conductive layer (first metal interconnect layer) is deposited. There is an insulating layer (first intermetal dielectric) layer deposited. A resistive layer is deposited on top of the insulating layer and structured in order to serve as a thin film resistor. A second insulating layer (second intermetal dielectric) is then deposited on top of the resistive layer. A first opening is etched into the insulating layers (first and second intermetal dielectric) down to the first conductive layer. A second opening is etched into the insulating layers (first and second intermetal dielectrics) down to the first conductive layer. A cross-sectional plane of the second opening is arranged such that it at least partially overlaps the resistive layer of the thin film resistor in a first direction.
    Type: Application
    Filed: September 22, 2014
    Publication date: January 8, 2015
    Inventors: Christoph Andreas Othmar DIRNECKER, Leif Christian OLSEN
  • Patent number: 8871603
    Abstract: The invention relates to a semiconductor device and a method of manufacturing an electronic device. A first conductive layer (first metal interconnect layer) is deposited. There is an insulating layer (first intermetal dielectric) layer deposited. A resistive layer is deposited on top of the insulating layer and structured in order to serve as a thin film resistor. A second insulating layer (second intermetal dielectric) is then deposited on top of the resistive layer. A first opening is etched into the insulating layers (first and second intermetal dielectric) down to the first conductive layer. A second opening is etched into the insulating layers (first and second intermetal dielectrics) down to the first conductive layer. A cross-sectional plane of the second opening is arranged such that it at least partially overlaps the resistive layer of the thin film resistor in a first direction.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: October 28, 2014
    Assignees: Texas Instruments Deutschland GmbH, Texas Instruments Incorporated
    Inventors: Christoph Andreas Othmar Dirnecker, Leif Christian Olsen
  • Publication number: 20120280360
    Abstract: The invention relates to a semiconductor device and a method of manufacturing an electronic device. A first conductive layer (first metal interconnect layer) is deposited. There is an insulating layer (first intermetal dielectric) layer deposited. A resistive layer is deposited on top of the insulating layer and structured in order to serve as a thin film resistor. A second insulating layer (second intermetal dielectric) is then deposited on top of the resistive layer. A first opening is etched into the insulating layers (first and second intermetal dielectric) down to the first conductive layer. A second opening is etched into the insulating layers (first and second intermetal dielectrics) down to the first conductive layer. A cross-sectional plane of the second opening is arranged such that it at least partially overlaps the resistive layer of the thin film resistor in a first direction.
    Type: Application
    Filed: May 3, 2012
    Publication date: November 8, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christoph Andreas Othmar DIRNECKER, Leif Christian OLSEN