Patents by Inventor Christoph Bilger
Christoph Bilger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9625281Abstract: A magnetic angle sensor may include a first bridge circuit. The first bridge circuit may include a first half-bridge to generate a first signal indicative of a first angular component of a direction of a magnetic field. The first bridge circuit may include a second half-bridge to generate a second signal indicative of a second angular component of the direction of the magnetic field. The second angular component may be linearly independent from the first angular component.Type: GrantFiled: December 23, 2014Date of Patent: April 18, 2017Assignee: Infineon Technologies AGInventors: Christoph Bilger, Konrad Kapser
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Publication number: 20160178403Abstract: A magnetic angle sensor may include a first bridge circuit. The first bridge circuit may include a first half-bridge to generate a first signal indicative of a first angular component of a direction of a magnetic field. The first bridge circuit may include a second half-bridge to generate a second signal indicative of a second angular component of the direction of the magnetic field. The second angular component may be linearly independent from the first angular component.Type: ApplicationFiled: December 23, 2014Publication date: June 23, 2016Inventors: Christoph Bilger, Konrad Kapser
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Patent number: 8543831Abstract: A system and method is disclosed, including establishing of data connections between electronic devices. One embodiment provides a method for establishing a data connection between a first and a second electronic device, wherein establishing the data connection is authorized by executing at least one action with at least one physical tool.Type: GrantFiled: November 14, 2007Date of Patent: September 24, 2013Assignee: Qimonda AGInventors: Christoph Bilger, Rex Kho, Achim Schramm, Martin Maier, Yann Zinzius, Armin Kohlhase
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Patent number: 8390633Abstract: A memory device comprises a memory array and a processing device. The memory array is configured to store a graphic data set. The processing device is configured to initiate outputting of data of the graphic data set from the memory array and to combine the outputted data in response to a read request for providing a graphic content.Type: GrantFiled: June 29, 2007Date of Patent: March 5, 2013Assignee: Qimonda AGInventors: Christoph Bilger, Rex Kho, Achim Schramm, Martin Maier, Yann Zinzius, Armin Kohlhase
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Patent number: 8392779Abstract: A method of adjusting an interface voltage includes transferring data between a memory device and a controller, and detecting whether an error occurred in the transfer of data. An interface voltage of at least one of the memory device and the controller is adjusted based on the detection.Type: GrantFiled: April 25, 2008Date of Patent: March 5, 2013Assignee: Qimonda AGInventors: Andreas Schneider, Markus Balb, Thomas Hein, Christoph Bilger, Martin Brox, Peter Gregorius, Michael Richter
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Patent number: 8305834Abstract: A semiconductor memory including a plurality of memory banks disposed on an integrated circuit, each memory bank including an array of memory cells, wherein a first portion of memory cells of the plurality of memory banks has a first access speed and a second portion of memory cells of the plurality of memory banks has a second access speed, wherein the first access speed is different from the second access speed.Type: GrantFiled: February 23, 2010Date of Patent: November 6, 2012Assignee: Qimonda AGInventors: Michael Richter, Markus Balb, Christoph Bilger, Martin Brox, Peter Gregorius, Thomas Hein, Andreas Schneider
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Patent number: 8271827Abstract: A system including a central processing unit, a first memory channel being configured to couple the central processing unit to a first semiconductor memory unit, wherein the first memory channel is configured to be clocked with a first clock frequency, and a second memory channel being configured to couple the central processing unit to a second semiconductor memory unit, wherein the second memory channel is configured or configurable to be clocked with a second clock frequency smaller than the first clock frequency.Type: GrantFiled: December 10, 2007Date of Patent: September 18, 2012Assignee: QimondaInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Patent number: 8144755Abstract: The invention provides a method and an apparatus for determining a skew of each data bit of an encoded data word received by a receiver via an interface from a transmitter comprising the steps of performing an error check and correction of the received and sampled encoded data word to calculate an error corrected encoded data word corresponding to the encoded data word transmitted by the transmitter, and correlating a sequence of error corrected encoded data words with the sampled encoded data words to determine a skew of each data bit of said received encoded data words.Type: GrantFiled: November 29, 2007Date of Patent: March 27, 2012Inventors: Michael Bruennert, Christoph Bilger, Peter Gregorius, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Patent number: 8120958Abstract: The multi-die memory comprises a first die and a second die. The first die comprises a first group of memory banks, and the second die comprises a second group of memory banks. The first group of memory banks and the second group of memory banks are coupled to a common memory interface. The common memory interface couples the multi-die memory with an internal connection.Type: GrantFiled: December 24, 2007Date of Patent: February 21, 2012Assignee: Qimonda AGInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Patent number: 8015438Abstract: The invention provides a memory circuit comprising a plurality of storage cells for storing data and redundant spare storage cells for replacing defective storage cells, and a memory access logic for accessing said storage cells connected to a replacement setting register which is writeable during operation of said memory circuit to store replacement settings.Type: GrantFiled: November 29, 2007Date of Patent: September 6, 2011Assignee: Qimonda AGInventors: Michael Bruennert, Christoph Bilger, Peter Gregorius, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Publication number: 20110205828Abstract: A semiconductor memory including a plurality of memory banks disposed on an integrated circuit, each memory bank including an array of memory cells, wherein a first portion of memory cells of the plurality of memory banks has a first access speed and a second portion of memory cells of the plurality of memory banks has a second access speed, wherein the first access speed is different from the second access speed.Type: ApplicationFiled: February 23, 2010Publication date: August 25, 2011Applicant: QIMONDA AGInventors: Michael Richter, Markus Balb, Christoph Bilger, Martin Brox, Peter Gregorius, Thomas Hein, Andreas Schneider
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Patent number: 7928525Abstract: An integrated circuit includes a device stack including: a memory device with a first wireless coupling element, and a semiconductor device with a second wireless coupling element. The first and second wireless coupling elements are arranged face-to-face and are configured to provide a wireless connection between the memory device and the semiconductor device.Type: GrantFiled: April 25, 2008Date of Patent: April 19, 2011Assignee: Qimonda AGInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Patent number: 7920433Abstract: Method and apparatus that relate to a storage device comprising a plurality of memory cells, an interface device configured to connect the storage device to a host system and configured to transmit signals to read and write data from the host system to the memory cells via a first and second data path, and a logic unit. The logic unit is configured to read and write data from the plurality of memory cells via the second data path, and configured to perform logic operations on data stored in the plurality of memory cells. When performing read and write operations, the first data path excludes the logic unit, and the second data path includes the logic unit. Furthermore, the logic unit is communicatively coupled between the interface device and the plurality of memory cells. Additionally, a method for manufacturing the memory device is provided.Type: GrantFiled: January 9, 2008Date of Patent: April 5, 2011Assignee: Qimonda AGInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Publication number: 20110034045Abstract: Stackable circuit devices include mechanical and electrical connection elements that are optionally disengageable and disconnectable. The mechanical connection elements comprise pairs of complementary male and female plug-in engagement elements respectively arranged at opposite matching positions on top and bottom faces of each device package. The male and female plug-in engagement elements provide a mutual plug-in engagement. The electrical connection elements comprise a plurality of first and second complementary contact elements respectively arranged in opposite and matching positions on either the top or bottom face of each device package. When the circuit devices are stacked, the first contact elements are respectively configured to provide an electrical connection to a complementary matching second contact element of an adjacently plugged in circuit device.Type: ApplicationFiled: August 6, 2009Publication date: February 10, 2011Applicant: QIMONDA AGInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Patent number: 7757064Abstract: A method of sending data on request from a memory to a device, wherein the memory receives a request from the device for sending predetermined data to the device, wherein the memory sends data and information about the data to the device.Type: GrantFiled: September 7, 2006Date of Patent: July 13, 2010Assignee: Infineon Technologies AGInventors: Markus Balb, Peter Mayer, Wolfgang Spirkl, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
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Patent number: 7746724Abstract: A method and apparatus for accessing a memory device. The method includes providing control signals for an access command to the memory device via an asynchronous interface and transmitting data for the access command to the memory device. The method also includes encoding, into the transmitted data, a clock signal. The encoded clock signal in the transmitted data is used by the memory device for receiving the data transmission.Type: GrantFiled: January 31, 2007Date of Patent: June 29, 2010Assignee: Qimonda AGInventors: Peter Mayer, Wolfgang Spirkl, Markus Balb, Christoph Bilger, Martin Brox, Thomas Hein, Michael Richter
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Publication number: 20090287957Abstract: A memory control unit for controlling a memory module comprising a plurality of memory cells, said memory control unit comprising means for detecting failure of at least one memory cell, means for deactivating said at least one defective memory cell, means for assigning the address of said at least one defective memory cell to at least one replacement memory cell, first tracking means for tracking the remaining replacement memory cells and masking means to hide the address of a defective memory cell to prevent further usage of this address instead of assigning said address to a replacement memory cell.Type: ApplicationFiled: May 16, 2008Publication date: November 19, 2009Inventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler
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Publication number: 20090267678Abstract: An integrated circuit includes: a terminal for outputting data, a driver for providing the data to the terminal, and a switch for selectively connecting/disconnecting the driver to the terminal. The disconnection of the driver reduces the capacitive load on the connection between the terminal and driver, thus reducing limitations on data rate from factors such as data reflections that reduce signal quality. Selective connection/disconnection allows the driver to be reconnected to the terminal only when needed.Type: ApplicationFiled: April 25, 2008Publication date: October 29, 2009Applicant: QIMONDA AGInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Publication number: 20090267084Abstract: An integrated circuit includes a device stack including: a memory device with a first wireless coupling element, and a semiconductor device with a second wireless coupling element. The first and second wireless coupling elements are arranged face-to-face and are configured to provide a wireless connection between the memory device and the semiconductor device.Type: ApplicationFiled: April 25, 2008Publication date: October 29, 2009Applicant: QIMONDA AGInventors: Christoph Bilger, Peter Gregorius, Michael Bruennert, Maurizio Skerlj, Wolfgang Walthes, Johannes Stecker, Hermann Ruckerbauer, Dirk Scheideler, Roland Barth
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Publication number: 20090271678Abstract: A method of adjusting an interface voltage includes transferring data between a memory device and a controller, and detecting whether an error occurred in the transfer of data. An interface voltage of at least one of the memory device and the controller is adjusted based on the detection.Type: ApplicationFiled: April 25, 2008Publication date: October 29, 2009Inventors: Andreas Schneider, Markus Balb, Thomas Hein, Christoph Bilger, Martin Brox, Peter Gregorius, Michael Richter