Abstract: In accordance with an embodiment, a method includes receiving, by at least one of a plurality of battery monitoring circuits a frequency synchronization signal and measurement frequency information from a host controller, wherein the at least one of the plurality of battery monitoring circuits is connected to at least one of a plurality of battery blocks; generating, by the at least one of the plurality of battery monitoring circuits, a periodic signal based on a clock signal having a clock frequency, the measurement frequency information, and the frequency synchronization signal; obtaining, by the at least one of the plurality of battery monitoring circuits, at least one measurement value of the at least one of the plurality of battery blocks using the periodic signal; and transmitting, by the at least one of the plurality of battery monitoring circuits, the at least one measurement value to the host controller.

Abstract: A device for controlling trapped ions includes an ion trap, a plurality of field electrodes configured to control ions in the ion trap, and a controller chip. The controller chip includes at least one delta-sigma digital to analog converter (DS-DAC) module including a DS-DAC circuit configured to receive a digital data stream, convert the digital data stream to analog control voltages, and supply the analog control voltages to the field electrodes.

Abstract: In accordance with an embodiment, a method includes receiving, by at least one of a plurality of battery monitoring circuits a frequency synchronization signal and measurement frequency information from a host controller, wherein the at least one of the plurality of battery monitoring circuits is connected to at least one of a plurality of battery blocks; generating, by the at least one of the plurality of battery monitoring circuits, a periodic signal based on a clock signal having a clock frequency, the measurement frequency information, and the frequency synchronization signal; obtaining, by the at least one of the plurality of battery monitoring circuits, at least one measurement value of the at least one of the plurality of battery blocks using the periodic signal; and transmitting, by the at least one of the plurality of battery monitoring circuits, the at least one measurement value to the host controller.

Abstract: In accordance with an embodiment, a method includes receiving, by at least one of a plurality of battery monitoring circuits a frequency synchronization signal and measurement frequency information from a host controller, wherein the at least one of the plurality of battery monitoring circuits is connected to at least one of a plurality of battery blocks; generating, by the at least one of the plurality of battery monitoring circuits, a periodic signal based on a clock signal having a clock frequency, the measurement frequency information, and the frequency synchronization signal; obtaining, by the at least one of the plurality of battery monitoring circuits, at least one measurement value of the at least one of the plurality of battery blocks using the periodic signal; and transmitting, by the at least one of the plurality of battery monitoring circuits, the at least one measurement value to the host controller.

Abstract: A method and a temperature detection circuit are disclosed. An example of the method includes driving an alternating current with a first frequency into a battery and detecting an imaginary part of a battery impedance at the first frequency; driving an alternating current with a second frequency different from the first frequency into the battery and detecting an imaginary part of the battery impedance at the second frequency; and calculating an intercept frequency at which the imaginary part equals a predefined value at least based on the imaginary part obtained at the first frequency and the imaginary part obtained at the second frequency.

Abstract: In accordance with an embodiment, a method includes receiving, by at least one of a plurality of battery monitoring circuits a frequency synchronization signal and measurement frequency information from a host controller, wherein the at least one of the plurality of battery monitoring circuits is connected to at least one of a plurality of battery blocks; generating, by the at least one of the plurality of battery monitoring circuits, a periodic signal based on a clock signal having a clock frequency, the measurement frequency information, and the frequency synchronization signal; obtaining, by the at least one of the plurality of battery monitoring circuits, at least one measurement value of the at least one of the plurality of battery blocks using the periodic signal; and transmitting, by the at least one of the plurality of battery monitoring circuits, the at least one measurement value to the host controller.

Abstract: A method and a temperature detection circuit are disclosed. An example of the method includes driving an alternating current with a first frequency into a battery and detecting an imaginary part of a battery impedance at the first frequency; driving an alternating current with a second frequency different from the first frequency into the battery and detecting an imaginary part of the battery impedance at the second frequency; and calculating an intercept frequency at which the imaginary part equals a predefined value at least based on the imaginary part obtained at the first frequency and the imaginary part obtained at the second frequency.

Abstract: A circuit is described that includes a rectifier configured to rectify a DC output from an AC input, a sensing unit configured to detect a voltage level of the DC output, and a control unit configured to control the rectifier based on the voltage level of the DC output. The control unit is configured to control the rectifier output by at least controlling the rectifier to rectify the DC output from the AC input if the voltage level of the DC output does not indicate an overvoltage condition at the circuit. In addition, the control unit is configured to control the rectifier based on the voltage level of the DC output by at least controlling the rectifier to shunt current from the AC input if the voltage level of the DC output does indicate the overvoltage condition.

Abstract: Representative implementations of devices and techniques determine the timing of switches associated with a dc-dc converter. The determination is based on a body diode conduction of at least one of the switches, which is detected and used to determine a switching delay.

Abstract: Methods, devices, and integrated circuits are disclosed for providing a buck converter charger in a multiphase buck converter topology comprising at least a first phase, a second phase, and an alternative charging switch, wherein the first phase includes a first high-side switch and a first low-side switch and the second phase includes a second high-side switch and a second low-side switch. The methods, devices, and integrated circuits may control at least one phase to operate as a boost converter, control at least one phase to operate as buck converter, and close the alternative charging switch in the multiphase buck converter topology to connect an alternative charging source to a system voltage output, the alternative charging switch coupled to the first phase between the first high-side switch and the first low-side switch.

Abstract: A power converter is described that includes components arranged within a first die and a second die of a single package. The first die includes one or more first switches coupled to a switching node of a power stage. The second die includes one or more second switches coupled to the switching node of the power stage, a feedback control unit configured to detect a current level at the one or more second switches of the power stage, and a controller unit configured to control the one or more first switches and the one or more second switches of the power stage based at least in part on the current level detected by the feedback control unit.

Abstract: Amplifier for an ultra-wideband (UWB) signal receiver having a signal input (15) for receiving an ultra-wideband signal which is sent by a transmitter (1) and which is transmitted in a sequence of transmission channels (K.sub.i) (which each have a particular frequency bandwidth) which has been agreed between the transmitter (1) and the receiver (4); a transistor (18) whose control connection is connected to the signal input (15); a resonant circuit (26, 30, 31) which is connected to the transistor (18) and whose resonant frequency can be set for the purpose of selecting the transmission channel (K.sub.i) in line with the agreed sequence of transmission channels; and having a signal output (29) for outputting the amplified ultra-wideband signal, the signal output being tapped off between the transistor (18) and the resonant circuit.

Abstract: A circuit is described that includes a rectifier configured to rectify a DC output from an AC input, a sensing unit configured to detect a voltage level of the DC output, and a control unit configured to control the rectifier based on the voltage level of the DC output. The control unit is configured to control the rectifier output by at least controlling the rectifier to rectify the DC output from the AC input if the voltage level of the DC output does not indicate an overvoltage condition at the circuit. In addition, the control unit is configured to control the rectifier based on the voltage level of the DC output by at least controlling the rectifier to shunt current from the AC input if the voltage level of the DC output does indicate the overvoltage condition.

Abstract: A power converter is described that includes components arranged within a first die and a second die of a single package. The first die includes one or more first switches coupled to a switching node of a power stage. The second die includes one or more second switches coupled to the switching node of the power stage, a feedback control unit configured to detect a current level at the one or more second switches of the power stage, and a controller unit configured to control the one or more first switches and the one or more second switches of the power stage based at least in part on the current level detected by the feedback control unit.

Abstract: Methods, devices, and integrated circuits are disclosed for providing a buck converter charger in a multiphase buck converter topology comprising at least a first phase, a second phase, and an alternative charging switch, wherein the first phase includes a first high-side switch and a first low-side switch and the second phase includes a second high-side switch and a second low-side switch. The methods, devices, and integrated circuits may control at least one phase to operate as a boost converter, control at least one phase to operate as buck converter, and close the alternative charging switch in the multiphase buck converter topology to connect an alternative charging source to a system voltage output, the alternative charging switch coupled to the first phase between the first high-side switch and the first low-side switch.

Abstract: A fast frequency-hopping transceiver comprises a RF-unit arranged on a first chip, a base-band unit on a second chip, a bidirectional operable data and control interface arranged between said first and said second chip having at least one data line for data communication, at least one control line for controlling the data communication and at least one clock line for providing a clock signal, memory means implemented within said RF-unit containing all the required chip settings which are specific to a certain frequency of received and/or transmitted data being part of the intended hopping sequence. The transceiver also includes control means for programming said memory means during an initialization phase during a set-up of a communication link of said data communication.

Abstract: Representative implementations of devices and techniques determine the timing of switches associated with a dc-dc converter. The determination is based on a body diode conduction of at least one of the switches, which is detected and used to determine a switching delay.

Abstract: Amplifier for an ultra-wideband (UWB) signal receiver having a signal input (15) for receiving an ultra-wideband signal which is sent by a transmitter (1) and which is transmitted in a sequence of transmission channels (K.sub.i) (which each have a particular frequency bandwidth) which has been agreed between the transmitter (1) and the receiver (4); a transistor (18) whose control connection is connected to the signal input (15); a resonant circuit (26, 30, 31) which is connected to the transistor (18) and whose resonant frequency can be set for the purpose of selecting the transmission channel (K.sub.i) in line with the agreed sequence of transmission channels; and having a signal output (29) for outputting the amplified ultra-wideband signal, the signal output being tapped off between the transistor (18) and the resonant circuit.

Abstract: A fast frequency-hopping transceiver comprises a RF-unit arranged on a first chip, a base-band unit on a second chip, a bidirectional operable data and control interface arranged between said first and said second chip having at least one data line for data communication, at least one control line for controlling the data communication and at least one clock line for providing a clock signal, memory means implemented within said RF-unit containing all the required chip settings which are specific to a certain frequency of received and/or transmitted data being part of the intended hopping sequence. The transceiver also includes control means for programming said memory means during an initialization phase during a set-up of a communication link of said data communication.

Abstract: Amplifier for an ultra-wideband (UWB) signal receiver having a signal input (15) for receiving an ultra-wideband signal which is sent by a transmitter (1) and which is transmitted in a sequence of transmission channels (Ki) (which each have a particular frequency bandwidth) which has been agreed between the transmitter (1) and the receiver (4); a transistor (18) whose control connection is connected to the signal input (15); a resonant circuit (26, 30, 31) which is connected to the transistor (18) and whose resonant frequency can be set for the purpose of selecting the transmission channel (Ki) in line with the agreed sequence of transmission channels; and having a signal output (29) for outputting the amplified ultra-wideband signal, the signal output being tapped off between the transistor (18) and the resonant circuit.