Patents by Inventor Christophe G. M. M. Detavernier

Christophe G. M. M. Detavernier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs
    Publication number: 20110256675
    Abstract: A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
    Type: Application
    Filed: June 3, 2011
    Publication date: October 20, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phaedon Avouris, Roy A. Carruthers, Jia Chen, Christophe G.M.M. Detavernier, Christian Lavoie, Hon-Sum Philip Wong
  • Self-aligned process for nanotube/nanowire FETs
    Patent number: 7598516
    Abstract: A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Roy A. Carruthers, Jia Chen, Christophe G. M. M. Detavernier, Christian Lavoie, Hon-Sum Philip Wong
  • SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs
    Publication number: 20080227259
    Abstract: A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
    Type: Application
    Filed: May 22, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phaedon Avouris, Roy A. Carruthers, Jia Chen, Christophe G.M.M. Detavernier, Christian Lavoie, Hon-Sum Philip Wong