Abstract: A novel system is offered for supplying power from an input node to a load coupled to an output node. The system may have multiple switches coupled between the input node and the output node. One or more limiting circuits may be configured for controlling the switches so as to limit outputs of the switches. For example, the limiting circuits may limit current through the respective switches. One or more timers may set a delay period for indicating a fault condition after the limiting is initiated.

Abstract: A novel system is offered for supplying power from an input node to a load coupled to an output node. The system may have multiple switches coupled between the input node and the output node. One or more limiting circuits may be configured for controlling the switches so as to limit outputs of the switches. For example, the limiting circuits may limit current through the respective switches. One or more timers may set a delay period for indicating a fault condition after the limiting is initiated.

Abstract: A novel system is offered for supplying power from an input node to a load coupled to an output node. The system may have multiple switches coupled between the input node and the output node. One or more limiting circuits may be configured for controlling the switches so as to limit outputs of the switches. For example, the limiting circuits may limit current through the respective switches. One or more timers may set a delay period for indicating a fault condition after the limiting is initiated.

Abstract: Circuitry for detecting faults in a system for supplying power from an input node to an output node and having at least one switch coupled between the input node and the output node. The fault detecting circuitry is configured for indicating a fault condition of the switch when the switch is commanded to turn on and at least one of the following conditions is detected: a voltage across the switch exceeds a predetermined value or a value of the switch control signal is insufficient to turn the switch on. The fault condition is indicated only if the detected condition is present for a predetermined period of time.

Abstract: Circuitry for detecting faults in a system for supplying power from an input node to an output node and having at least one switch coupled between the input node and the output node. The fault detecting circuitry is configured for indicating a fault condition of the switch when the switch is commanded to turn on and at least one of the following conditions is detected: a voltage across the switch exceeds a predetermined value or a value of the switch control signal is insufficient to turn the switch on. The fault condition is indicated only if the detected condition is present for a predetermined period of time.

Abstract: A novel system is offered for supplying power from an input node to a load coupled to an output node. The system may have multiple switches coupled between the input node and the output node. One or more limiting circuits may be configured for controlling the switches so as to limit outputs of the switches. For example, the limiting circuits may limit current through the respective switches. One or more timers may set a delay period for indicating a fault condition after the limiting is initiated.

Abstract: An apparatus and method for load sharing among N current supplies, where N>1. N current supply paths are coupled to corresponding N independent power sources, respectively. A system load is coupled to the outputs of the N current supply paths to receive N current supplies. There is a common current share bus configured to connect to the N current supply paths to provide a common current share signal, used to indicate the current contribution needed from each of the N current supply paths. In this configuration, each of the N current supply paths adjusts an adjustable voltage drop between its power source and the current supply it provides to the system load in accordance with the common current share signal so that the current supplied from each current supply path is consistent with the common current share signal.

Abstract: A method of and system for controlling the inrush current generated in a MOSFET of an inrush current control system, wherein the MOSFET includes a source, gate and drain. The dV/dt at the drain of the MOSFET is controlled so as to set the inrush current level as a function of dV/dt, independent of current limit without requiring a separate capacitor connected between the gate and drain of the MOSFET so that the MOSFET can turn on and off more quickly.

Abstract: A method of and system for controlling the inrush current generated in a MOSFET of an inrush current control system, wherein the MOSFET includes a source, gate and drain. The dV/dt at the drain of the MOSFET is controlled so as to set the inrush current level as a function of dV/dt, independent of current limit without requiring a separate capacitor connected between the gate and drain of the MOSFET so that the MOSFET can turn on and off more quickly.

Abstract: An apparatus and method for load sharing among N current supplies, where N>1. N current supply paths are coupled to corresponding N independent power sources, respectively. A system load is coupled to the outputs of the N current supply paths to receive N current supplies. There is a common current share bus configured to connect to the N current supply paths to provide a common current share signal, used to indicate the current contribution needed from each of the N current supply paths. In this configuration, each of the N current supply paths adjusts an adjustable voltage drop between its power source and the current supply it provides to the system load in accordance with the common current share signal so that the current supplied from each current supply path is consistent with the common current share signal.

Abstract: An output signal is controlled with adjustable hysteresis in response to a variable voltage input signal. One or more signals derived from the input signal are respectively compared with first and second reference voltages of different magnitudes. The output signal changes from a first state to a second state when one of the derived signals reaches a first reference voltage level threshold, and changes from the second state to the first state when a second one of the derived signals reaches a second reference level voltage threshold. A first derived signal may be varied to have a voltage magnitude that is greater or lesser than the voltage magnitude of a second derived signal while maintaining a positive hysteresis level. The circuit may be configured to output a signal representing an undervoltage and/or overvoltage condition of the input signal.