Patents by Inventor Christopher D. James

Christopher D. James has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5627396
    Abstract: A bridging member extending across a cavity in a semiconductor substrate (e.g. signal crystal silicon) has successive layers--a masking layer, an electrically conductive layer (e.g. polysilicon) and an insulating layer (e.g. SiO.sub.2). A first electrical contact (e.g. gold coated with ruthenium) extends on the insulating layer in a direction perpendicular to the extension of the bridging member across the cavity. A pair of bumps (e.g. gold) are on the insulating layer each between the contact and one of the cavity ends. Initially the bridging member and then the contact and the bumps are formed on the substrate and then the cavity is etched in the substrate through holes in the bridging member. A pair of second electrical contacts (e.g. gold coated with ruthenium) are on the surface of an insulating substrate (e.g. pyrex glass) adjacent the semiconductor substrate. The two substrates are bonded after the contacts are cleaned.
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: May 6, 1997
    Assignee: Brooktree Corporation
    Inventors: Christopher D. James, Henry S. Katzenstein
  • Patent number: 5620933
    Abstract: A bridging member extending across a cavity in a semiconductor substrate (e.g. single crystal silicon) has successive layers--a masking layer, an electrically conductive layer (e.g. polysilicon) and an insulating layer (e.g. SiO.sub.2). A first electrical contact (e.g. gold coated with ruthenium) extends on the insulating layer in a direction perpendicular to the extension of the bridging member across the cavity. A pair of bumps (e.g. gold) are on the insulating layer each between the contact and one of the cavity ends. Initially the bridging member and then the contact and the bumps are formed on the substrate and then the cavity is etched in the substrate through holes in the bridging member. A pair of second electrical contacts (e.g. gold coated with ruthenium) are on the surface of an insulating substrate (e.g. pyrex glass) adjacent the semiconductor substrate. The two substrates are bonded after the contacts are cleaned.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: April 15, 1997
    Assignee: Brooktree Corporation
    Inventors: Christopher D. James, Henry S. Katzenstein
  • Patent number: 5479042
    Abstract: A bridging member extending across a cavity in a semiconductor substrate (e.g. single crystal silicon) has successive layers--a masking layer, an electrically conductive layer (e.g. polysilicon) and an insulating layer (e.g. SiO.sub.2). A first electrical contact (e.g. gold coated with ruthenium) extends on the insulating layer in a direction perpendicular to the extension of the bridging member across the cavity. A pair of bumps (e.g. gold) are on the insulating layer each between the contact and one of the cavity ends. Initially the bridging member and then the contact and the bumps are formed on the substrate and then the cavity is etched in the substrate through holes in the bridging member. A pair of second electrical contacts (e.g. gold coated with ruthenium) are on the surface of an insulating substrate (e.g. pyrex glass) adjacent the semiconductor substrate. The two substrates are bonded after the contacts are cleaned.
    Type: Grant
    Filed: February 1, 1903
    Date of Patent: December 26, 1995
    Assignee: Brooktree Corporation
    Inventors: Christopher D. James, Henry S. Katzenstein
  • Patent number: 4598308
    Abstract: An assembly of intercoupled integrated circuit die comprises: a substrate having a plurality of holes which extend through the substrate; each hole is of a size that is suitable to receive an integrated circuit die; a plurality of independent subassemblies are also provided; each subassembly includes an integrated circuit die and a heat sink which is attached to the back of the die and extends beyond it; each subassembly is aligned with a respective hole in the substrate such that the die lies in the hole and the heat sink extends beyond the hole and attaches to the substrate; subassemblies are interconnected by printed conductors on the substrate and discrete wires that are bonded from the front of the die to the conductors; and the die and heat sink have similar thermal expansion coefficients, while the substrate has a substantially different thermal expansion coefficient.
    Type: Grant
    Filed: April 2, 1984
    Date of Patent: July 1, 1986
    Assignee: Burroughs Corporation
    Inventors: Christopher D. James, Norman E. McNeal