Patents by Inventor Christopher Dinh

Christopher Dinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11561713
    Abstract: Aspects of a storage device including a memory and a controller are provided which simplify controller management of logical and physical meta-dies and meta-blocks by allowing a logical meta-die to be mapped to multiple physical meta-dies. The memory includes first dies grouped in a first physical meta-die and second dies grouped in a second physical meta-die. The physical meta-dies each include physical meta-blocks. The controller maps a logical meta-die to the first physical meta-die and the second physical meta-die. The controller may also map logical meta-blocks of the logical meta-die to the physical meta-blocks. For instance, the controller may associate a first logical metablock of the logical meta-die to the first physical meta-die and a second logical metablock of the logical meta-die to the second physical meta-die. As a result, firmware complexity in managing meta-dies and meta-blocks may be reduced compared to one-to-one logical-to-physical meta-die mapping approaches.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: January 24, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Hiep Tran, Dhayanithi Rajendiran, Christopher Dinh
  • Publication number: 20220291836
    Abstract: Aspects of a storage device including a memory and a controller are provided which simplify controller management of logical and physical meta-dies and meta-blocks by allowing a logical meta-die to be mapped to multiple physical meta-dies. The memory includes first dies grouped in a first physical meta-die and second dies grouped in a second physical meta-die. The physical meta-dies each include physical meta-blocks. The controller maps a logical meta-die to the first physical meta-die and the second physical meta-die. The controller may also map logical meta-blocks of the logical meta-die to the physical meta-blocks. For instance, the controller may associate a first logical metablock of the logical meta-die to the first physical meta-die and a second logical metablock of the logical meta-die to the second physical meta-die. As a result, firmware complexity in managing meta-dies and meta-blocks may be reduced compared to one-to-one logical-to-physical meta-die mapping approaches.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 15, 2022
    Inventors: Hiep TRAN, Dhayanithi Rajendiran, Christopher Dinh
  • Patent number: 9734098
    Abstract: A method of managing a memory bus includes identifying sub-operations required for execution of commands, maintaining a list of released sub-operations containing only released unexecuted sub-operations directed to individual dies that are identified as available, accessing the dies until the list is empty, subsequently, polling to identify dies that are available, and subsequently resuming accessing the dies by executing only sub-operations from the list until the list is empty.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 15, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Lee Gavens, Daniel Lee, Meiqing He, Christopher Dinh
  • Publication number: 20160292092
    Abstract: A method of managing a memory bus includes identifying sub-operations required for execution of commands, maintaining a list of released sub-operations containing only released unexecuted sub-operations directed to individual dies that are identified as available, accessing the dies until the list is empty, subsequently, polling to identify dies that are available, and subsequently resuming accessing the dies by executing only sub-operations from the list until the list is empty.
    Type: Application
    Filed: March 31, 2015
    Publication date: October 6, 2016
    Inventors: Lee Gavens, Daniel Lee, Meiqing He, Christopher Dinh
  • Patent number: 6993600
    Abstract: A controller for a writable optical media is presented. The controller includes a write control sequencer that monitors the transmission of data from a host device to the writable optical media without continuous supervision from a microcomputer. The write control sequencer monitors and controls data flow in response to descriptors which are loaded into the controller prior to the transfer by a microprocessor.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: January 31, 2006
    Assignee: Integrated Memory Logic, Inc.
    Inventors: Dam Thanh Vo, Christopher Dinh, Pengwei Liu