Patents by Inventor Christopher E Wrigley

Christopher E Wrigley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7240268
    Abstract: A test component and method of operation thereof are provided, the test component being arranged in a test environment to issue a test sequence over a bus to a device under test. A configuration file is provided to specify the behaviour of the test component, the configuration file comprising a plurality of regions with each region specifying attributes for use in determining the test sequence. The method of the present invention comprises the steps of: (a) when a test sequence is required to be issued, causing the test component to select, based on predetermined criteria, one of a number of regions provided by the configuration file; and (b) using the constraint attributes for that selected region to generate the test sequence to be issued on to the bus.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: July 3, 2007
    Assignee: Arm Limited
    Inventors: Christopher E Wrigley, Daniel J Coley, Andrew M Nightingale
  • Patent number: 7219178
    Abstract: Bus logic couples plural master logic units with plural slave logic units to enable data transfers. Each master unit performs an address transfer which, when received by a specified slave unit, causes a data transfer between that master unit and said specified slave unit. Each slave unit must complete a data transfer prior to performing any further data transfers. A slave unit performs data transfers in an order which differs from that in which associated address transfers were received by that slave unit. In response to an adress transfer, the bus logic couples a master unit with a slave unit to enable a data transfer. The bus logic determines whether propagation of an address transfer may cause a deadlock situation where data transfers can not take place between affected master and slave units and, if so, to prevent propagating that address transfer.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: May 15, 2007
    Assignee: Arm Limited
    Inventors: Antony J Harris, Bruce J Mathewson, Christopher E Wrigley
  • Publication number: 20040243334
    Abstract: A test component and method of operation thereof are provided, the test component being arranged in a test environment to issue a test sequence over a bus to a device under test. A configuration file is provided to specify the behaviour of the test component, the configuration file comprising a plurality of regions with each region specifying attributes for use in determining the test sequence. A number of the regions specify constraint attributes defining allowable test sequences. The method of the present invention comprises the steps of: (a) when a test sequence is required to be issued, causing the test component to select, based on predetermined criteria, one of a number of regions provided by the configuration file; and (b) using the constraint attributes for that selected region to generate the test sequence to be issued on to the bus.
    Type: Application
    Filed: May 30, 2003
    Publication date: December 2, 2004
    Applicant: ARM LIMITED
    Inventors: Christopher E. Wrigley, Daniel J. Coley, Andrew M. Nightingale