Abstract: An architecture for heterogeneous data processing which reuses the same hardware to process different data in different manners is disclosed. The different processing has a substantial similarity; such as performing different variations of a computation. For example, the computation may involve the same mathematical operations but use different constants or coefficients, or performing similar arithmetic operations that can be switched such as addition and subtraction, or performing arithmetic operations in different orders, etc. The different processing might be applying different convolution kernels depending on the pixel color. The differences between the kernels could include different kernel sizes, different coefficient locations, and different coefficient values. The same hardware is re-used for all of the similar computations, under the control of external control logic that allows hardware re-use.