Patents by Inventor Christopher J. Read

Christopher J. Read has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9430651
    Abstract: An arrangement is provided where a media server temporarily stores a DRM license that is associated with downloaded media content prior to copying the DRM license to a physical archival medium such as an optical disc. When the media server confirms that the DRM license is successfully copied to the physical archival medium, it destroys the temporarily stored DRM license.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 30, 2016
    Assignees: SONY CORPORATION, SONY ELECTRONICS INC.
    Inventors: Christopher J. Read, Robert Hardacker
  • Patent number: 8478694
    Abstract: An arrangement is provided where a media server temporarily stores a DRM license that is associated with downloaded media content prior to copying the DRM license to a physical archival medium such as an optical disc. When the media server confirms that the DRM license is successfully copied to the physical archival medium, it destroys the temporarily stored DRM license.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: July 2, 2013
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Christopher J. Read, Robert Hardacker
  • Publication number: 20130133082
    Abstract: An arrangement is provided where a media server temporarily stores a DRM license that is associated with downloaded media content prior to copying the DRM license to a physical archival medium such as an optical disc. When the media server confirms that the DRM license is successfully copied to the physical archival medium, it destroys the temporarily stored DRM license.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 23, 2013
    Inventors: Christopher J. Read, Robert Hardacker
  • Patent number: 8224752
    Abstract: A method of playing back content based on digital rights management (DRM) between a portable storage and a device and a portable storage for the same are provided. The method of playing back content using a portable storage includes requesting the portable storage to transmit a right to play back content protected through digital rights management (DRM), receiving the right to play back the content protected through DRM from the portable storage, and informing the portable storage of completion of the playback when a playback of the content protected through DRM using the right is completed.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: July 17, 2012
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Christopher J. Read, Robert Hardacker
  • Patent number: 7984505
    Abstract: An arrangement for managing a media file having an associated DRM license is provided by enabling the copying of the media file stored on a source medium to a target medium only when both the source medium and the target medium are held in custody by a media server. The media server writes a copy of a media file and a copy of the associated DRM license from the source medium to the target medium. Upon confirmation that the copy of the DRM license was successfully written to the target medium, the DRM license and media file on the source medium are overwritten. The result is that the target medium contains both the media files and the DRM licenses which are locked to the target medium.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: July 19, 2011
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Christopher J. Read
  • Patent number: 7436793
    Abstract: A system and method for effectively performing a transmit power adjustment procedure in a wireless network includes a forward receiver that monitors a wireless forward link for forward data that is transmitted over the wireless forward link by a forward transmitter. The forward transmitter initially transmits the forward data at a minimum power level, and gradually increases the minimum power level to a power level threshold at which the forward receiver first detects the forward data on the forward link. Once the forward receiver and the forward transmitter are successfully coupled over the wireless forward link, the forward transmitter may then transmit forward data at a normal operating power level. The foregoing transmit power adjustment procedure ensures that the forward receiver receives forward data only from the forward transmitter, and prevents other proximate wireless devices from inadvertently intercepting forward data transmitted by the forward receiver.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: October 14, 2008
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Christopher J. Read
  • Patent number: 7389317
    Abstract: A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus. An arithmetic logic unit performs parallel operations (addition, subtraction, Boolean functions) controlled by the same instructions. This arithmetic logic unit is divisible into a selected number of sections for performing identical operations on independent sections of its inputs. The multiplier unit may form dual products from separate parts of the input data.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: June 17, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Publication number: 20080117751
    Abstract: An arrangement is provided in which the health of a storage medium such as an optical disc is monitored by analyzing the level of error correction that must be applied to correct read errors from the optical disc. A replacement of the storage medium is generated through a copying process when the error level meets or exceeds a replacement threshold. Once the replacement medium is successfully generated, the digital rights management (“DRM”) license (that may be required to render or play the content from the storage medium) and/or the content contained on the storage medium is overwritten or erased.
    Type: Application
    Filed: November 22, 2006
    Publication date: May 22, 2008
    Inventor: Christopher J. Read
  • Publication number: 20080109366
    Abstract: An arrangement for managing a media file having an associated DRM license is provided by enabling the copying of the media file stored on a source medium to a target medium only when both the source medium and the target medium are held in custody by a media server. The media server writes a copy of a media file and a copy of the associated DRM license from the source medium to the target medium. Upon confirmation that the copy of the DRM license was successfully written to the target medium, the DRM license and media file on the source medium are overwritten. The result is that the target medium contains both the media files and the DRM licenses which are locked to the target medium.
    Type: Application
    Filed: November 3, 2006
    Publication date: May 8, 2008
    Inventor: Christopher J. Read
  • Publication number: 20080109368
    Abstract: An arrangement is provided where a media server temporarily stores a DRM license that is associated with downloaded media content prior to copying the DRM license to a physical archival medium such as an optical disc. When the media server confirms that the DRM license is successfully copied to the physical archival medium, it destroys the temporarily stored DRM license.
    Type: Application
    Filed: November 3, 2006
    Publication date: May 8, 2008
    Inventors: Christopher J. Read, Robert Hardacker
  • Publication number: 20080103976
    Abstract: A method of playing back content based on digital rights management (DRM) between a portable storage and a device and a portable storage for the same are provided. The method of playing back content using a portable storage includes requesting the portable storage to transmit a right to play back content protected through digital rights management (DRM), receiving the right to play back the content protected through DRM from the portable storage, and informing the portable storage of completion of the playback when a playback of the content protected through DRM using the right is completed.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 1, 2008
    Inventors: Christopher J. Read, Robert Hardacker
  • Patent number: 7242325
    Abstract: An error correction compensating ones or zeros string suppression system and method for use in a digital transmission system is herein disclosed. In digital transmission systems utilizing error control coding (ECC)/forward error correction (FEC) to reduce the number of bit errors in a bit stream, long strings of ones and zeros are easily suppressed by detecting a prohibited length of ones or zeros, and flipping a bit in the string of ones or zeros. This method and system removes the violation of the ones or zeros bit string requirement by flipping a bit in the string, while the receiving side utilizes the error correction capability of the ECC/FEC to correct the inverted bit.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: July 10, 2007
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Christopher J Read
  • Publication number: 20040224728
    Abstract: A user device enters a power save mode in which only the physical layer of its wireless communication system and minimal logic circuitry remains on. In a first implementation the minimal logic circuitry is in the MAC or the digital portion of the radio on a communication card, and the logic monitors the 802.11 traffic indication map (TIM) to determine whether traffic for the user device exists. If it does, the user is alerted or the device is powered on. In an optimum mode the minimal logic circuitry listens for a special sequence unique to the device, and if it detects the sequence leaves the power save mode.
    Type: Application
    Filed: September 19, 2003
    Publication date: November 11, 2004
    Applicants: SONY CORPORATION, SONY ELECTRONICS INC.
    Inventors: Behram Dacosta, David A. Desch, Christopher J. Read
  • Publication number: 20040194134
    Abstract: Disclosed is a method for changing channels in a digital television transport stream, which comprises accessing the digital television transport stream, itself comprising a plurality of multiplexed channels, by using a first tuner, displaying a first program channel from the digital television transport stream, detecting and storing in a buffer memory recent video data from a second channel while displaying the first channel by using a second tuner, immediately recalling and presenting a complete video frame from the stored video data of the second channel for display when the second channel is selected by the user, and displaying real-time video from the second channel when decodable real-time video data is available from the transport stream.
    Type: Application
    Filed: March 25, 2003
    Publication date: September 30, 2004
    Inventors: Priyan Deveka Gunatilake, Takaaki Ota, Christopher J. Read
  • Publication number: 20030105793
    Abstract: This invention is a data processing apparatus which operates on instruction controlling plural processor actions. Each instruction includes a data unit section and a data transfer section. These instruction sections are independent and may include differing options. In the preferred embodiment, each instruction is 64 bits. The data unit section includes a data operation field that indicates the type of arithmetic logic unit operation and six operand fields. The six operand fields include four source data register fields and two destination register fields. The data unit (110) includes a multiplication unit (220) and an arithmetic logic unit (230). The data unit (110) may include a barrel rotator (235) for one input of the arithmetic logic unit (230). The rotated data may be stored in the first destination register instead of the multiply result. The address unit (120) operations according to the data transfer operation field. This could be a load, a store or a register to register move.
    Type: Application
    Filed: April 9, 2002
    Publication date: June 5, 2003
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Patent number: 6370558
    Abstract: A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus. An arithmetic logic unit performs parallel operations (addition, subtraction, Boolean functions) controlled by the same instructions. This arithmetic logic unit is divisible into a selected number of sections for performing identical operations on independent sections of its inputs. The multiplier unit may form dual products from separate parts of the input data.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: April 9, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Patent number: 6240437
    Abstract: A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus. An arithmetic logic unit performs parallel operations (addition, subtraction, Boolean functions) controlled by the same instructions. This arithmetic logic unit is divisible into a selected number of sections for performing identical operations on independent sections of its inputs. The multiplier unit may form dual products from separate parts of the input data.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: May 29, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Patent number: 6219688
    Abstract: A method for forming a sum of the absolute value of the difference between each pair of numbers of respective first and second sets of numbers. The method includes forming the difference between a first number of the first set and a second number of the second set. Next this difference is either added to or subtracted from a running sum based upon the sign of this difference. This is repeated until all number pairs are either added to or subtracted from the running sum of absolute values of the differences. The initial subtraction is used to set a status bit in a flag register (211) based upon a less than zero output or the carry-out. The status bit controls whether the difference is added to or subtracted from the running sum. The conditional addition to or subtraction from the running sum may generate a carry-out representing the most significant bit of the running sum. This carry-out is stored and later added to the running sum to recover the most significant overflow bits.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: April 17, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read
  • Patent number: 6116768
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable barrel rotator (235). The rotate amount is a default rotate amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the barrel rotator (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the rotate amount. The output of the barrel rotator (235) may be stored independently of the arithmetic logic unit (230) result. In the preferred embodiment of this invention, the three input arithmetic logic unit (230) is embodied in a data processor circuits as a part of a multiprocessor integrated circuit (100) used in image processing.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: September 12, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 6098163
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239).
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: August 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse