Patents by Inventor Christopher M. Dennett
Christopher M. Dennett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11372555Abstract: A method and system may reconstruct data in a smart storage array where upon detection of data inconsistency, an application of the system is notified and affected data strips are rebuilt. When an initiator detects stripe corruption, the initiator may report the strip corruption to storage. The storage may lock the strip for I/O operations. Initiators may determine recovery scenarios for rebuilding the data strips and send the scenarios to storage. At storage, initiator replies may be collected, and a rebuild option with the highest votes may be automatically determined for a reconstruction operation. Once the reconstruction operation is completed, the rebuilt stripe may be unlocked and data operations may recommence.Type: GrantFiled: January 23, 2020Date of Patent: June 28, 2022Assignee: International Business Machines CorporationInventors: Asaf Porat-Stoler, Constantine Gavrilov, Christopher M. Dennett, Rivka Mayraz Matosevich, Sergey Marenkov, Jonathan Fischer-Toubol, Afief Halumi
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Publication number: 20210232324Abstract: A method and system may reconstruct data in a smart storage array where upon detection of data inconsistency, an application of the system is notified and affected data strips are rebuilt. When an initiator detects stripe corruption, the initiator may report the strip corruption to storage. The storage may lock the strip for I/O operations. Initiators may determine recovery scenarios for rebuilding the data strips and send the scenarios to storage. At storage, initiator replies may be collected, and a rebuild option with the highest votes may be automatically determined for a reconstruction operation. Once the reconstruction operation is completed, the rebuilt stripe may be unlocked and data operations may recommence.Type: ApplicationFiled: January 23, 2020Publication date: July 29, 2021Inventors: Asaf PORAT-STOLER, Constantine GAVRILOV, Christopher M. DENNETT, Rivka MAYRAZ MATOSEVICH, Sergey MARENKOV, Jonathan FISCHER-TOUBOL, Afief HALUMI
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Patent number: 10552243Abstract: Technology for handling page size mismatches when DPL-CLR is performed at multiple levels of a data storage system (for example, RAID level and flash card level). A “corrective DPL” corrects only a portion of the data that would make up a page at the level at which the data is stored (that is, the “initial DPL level”), and, after that, a partially corrected page of data is formed and stored in data storage, with the partially corrected page: (i) having a page size characteristic of the initial DPL; (ii) including the part of the data corrected by the corrective DPL; and (iii) further including other data. In some embodiments, the other data has a pattern that indicates that it is invalid, erroneous data, such that an error message will be returned if this portion of the data is attempted to be read.Type: GrantFiled: October 12, 2017Date of Patent: February 4, 2020Assignee: International Business Machines CorporationInventors: Roman A. Pletka, Timothy J. Fisher, Robert E. Galbraith, Kevin E. Sallese, Christopher M. Dennett
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Patent number: 10445016Abstract: A technique for handling storage commands includes receiving, by an interface node of a data storage system, a first storage command. The interface node determines whether the first storage command is a head of queue (HOQ) command. In response to determining the first storage command is an HOQ command, the interface node increments a constrained command count and issues the first storage command to a first worker processor core for processing. In response to determining the first storage command is not an HOQ command, the interface node processes the first storage command as a non-HOQ command.Type: GrantFiled: December 13, 2016Date of Patent: October 15, 2019Assignee: International Business Machines CorporationInventors: Shawn P. Authement, Kevin A. Bosien, Christopher M. Dennett, David E. Mullen
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Publication number: 20190114217Abstract: Technology for handling page size mismatches when DPL-CLR is performed at multiple levels of a data storage system (for example, RAID level and flash card level). A “corrective DPL” corrects only a portion of the data that would make up a page at the level at which the data is stored (that is, the “initial DPL level”), and, after that, a partially corrected page of data is formed and stored in data storage, with the partially corrected page: (i) having a page size characteristic of the initial DPL; (ii) including the part of the data corrected by the corrective DPL; and (iii) further including other data. In some embodiments, the other data has a pattern that indicates that it is invalid, erroneous data, such that an error message will be returned if this portion of the data is attempted to be read.Type: ApplicationFiled: October 12, 2017Publication date: April 18, 2019Inventors: Roman A. Pletka, Timothy J. Fisher, Robert E. Galbraith, Kevin E. Sallese, Christopher M. Dennett
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Publication number: 20180165038Abstract: A technique for handling storage commands includes receiving, by an interface node of a data storage system, a first storage command. The interface node determines whether the first storage command is a head of queue (HOQ) command. In response to determining the first storage command is an HOQ command, the interface node increments a constrained command count and issues the first storage command to a first worker processor core for processing. In response to determining the first storage command is not an HOQ command, the interface node processes the first storage command as a non-HOQ command.Type: ApplicationFiled: December 13, 2016Publication date: June 14, 2018Inventors: SHAWN P. AUTHEMENT, KEVIN A. BOSIEN, CHRISTOPHER M. DENNETT, DAVID E. MULLEN
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Patent number: 9798493Abstract: An interface receives a command corresponding to a non-volatile memory. The interface determines whether a bypass mode is enabled and whether the command is a medium-access command. A primary processing node processes the command in response to determining at least one of the following: that the bypass mode is disabled or that the command is not a medium-access command. A secondary processing node processes the command, in response to determining that the bypass mode is enabled and that the command is a medium-access command.Type: GrantFiled: December 16, 2013Date of Patent: October 24, 2017Assignee: International Business Machines CorporationInventors: Shawn P. Authement, Christopher M. Dennett, Gowrisankar Radhakrishnan, Donald J. Ziebarth
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Patent number: 9454433Abstract: Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods.Type: GrantFiled: June 11, 2014Date of Patent: September 27, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Christopher M. Dennett, Farnaz Toussi
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Patent number: 9396068Abstract: Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods.Type: GrantFiled: April 17, 2014Date of Patent: July 19, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Christopher M. Dennett, Farnaz Toussi
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Publication number: 20150301894Abstract: Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods.Type: ApplicationFiled: April 17, 2014Publication date: October 22, 2015Applicant: International Business Machines CorporationInventors: Christopher M. Dennett, Farnaz Toussi
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Publication number: 20150301895Abstract: Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods.Type: ApplicationFiled: June 11, 2014Publication date: October 22, 2015Inventors: Christopher M. DENNETT, Farnaz TOUSSI
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Publication number: 20150169254Abstract: An interface receives a command corresponding to a non-volatile memory. The interface determines whether a bypass mode is enabled and whether the command is a medium-access command. A primary processing node processes the command in response to determining at least one of the following: that the bypass mode is disabled or that the command is not a medium-access command. A secondary processing node processes the command, in response to determining that the bypass mode is enabled and that the command is a medium-access command.Type: ApplicationFiled: December 16, 2013Publication date: June 18, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shawn P. Authement, Christopher M. Dennett, Gowrisankar Radhakrishnan, Donald J. Ziebarth