Abstract: At least one method, apparatus and system disclosed herein for suppressing over-growth of epitaxial layer formed on fins of fin field effect transistor (finFET) to prevent shorts between fins of separate finFET devices. A set of fins of a first transistor is formed. The set of fins comprises a first outer fin, an inner fin, and a second outer fin. An oxide deposition process is performed for depositing an oxide material upon the set of fins. A first recess process is performed for removing a portion of oxide material. This leaves a portion of the oxide material remaining on the inside walls of the first and second outer fins. A spacer nitride deposition process is performed. A spacer nitride removal process is performed, leaving spacer nitride material at the outer walls of the first and second outer fins. A second recess process is performed for removing the oxide material from the inside walls of the first and second outer fins. An epitaxial layer deposition processed upon the set of fins.

Abstract: At least one method, apparatus and system disclosed herein for suppressing over-growth of epitaxial layer formed on fins of fin field effect transistor (finFET) to prevent shorts between fins of separate finFET devices. A set of fins of a first transistor is formed. The set of fins comprises a first outer fin, an inner fin, and a second outer fin. An oxide deposition process is performed for depositing an oxide material upon the set of fins. A first recess process is performed for removing a portion of oxide material. This leaves a portion of the oxide material remaining on the inside walls of the first and second outer fins. A spacer nitride deposition process is performed. A spacer nitride removal process is performed, leaving spacer nitride material at the outer walls of the first and second outer fins. A second recess process is performed for removing the oxide material from the inside walls of the first and second outer fins. An epitaxial layer deposition processed upon the set of fins.

Abstract: At least one method, apparatus and system disclosed herein for suppressing over-growth of epitaxial layer formed on fins of fin field effect transistor (finFET) to prevent shorts between fins of separate finFET devices. A set of fins of a first transistor is formed. The set of fins comprises a first outer fin, an inner fin, and a second outer fin. An oxide deposition process is performed for depositing an oxide material upon the set of fins. A first recess process is performed for removing a portion of oxide material. This leaves a portion of the oxide material remaining on the inside walls of the first and second outer fins. A spacer nitride deposition process is performed. A spacer nitride removal process is performed, leaving spacer nitride material at the outer walls of the first and second outer fins. A second recess process is performed for removing the oxide material from the inside walls of the first and second outer fins. An epitaxial layer deposition processed upon the set of fins.

Abstract: At least one method, apparatus and system disclosed herein for suppressing over-growth of epitaxial layer formed on fins of fin field effect transistor (finFET) to prevent shorts between fins of separate finFET devices. A set of fins of a first transistor is formed. The set of fins comprises a first outer fin, an inner fin, and a second outer fin. An oxide deposition process is performed for depositing an oxide material upon the set of fins. A first recess process is performed for removing a portion of oxide material. This leaves a portion of the oxide material remaining on the inside walls of the first and second outer fins. A spacer nitride deposition process is performed. A spacer nitride removal process is performed, leaving spacer nitride material at the outer walls of the first and second outer fins. A second recess process is performed for removing the oxide material from the inside walls of the first and second outer fins. An epitaxial layer deposition processed upon the set of fins.

Abstract: Field-effect transistors (FETs) and methods of fabricating field-effect transistors are provided, with one or both of a source cavity or a drain cavity having different channel junction characteristics. The methods include, for instance, recessing a semiconductor material to form a cavity adjacent to a channel region of the transistor, the recessing defining a bottom channel interface surface and a sidewall channel interface surface within the cavity; providing a protective liner over the sidewall channel interface surface, with the bottom channel interface surface being exposed within the cavity; processing the bottom channel interface surface to facilitate forming a first channel junction of the transistor; and removing the protective liner from over the sidewall channel interface surface, and subsequently processing the sidewall channel interface surface to form a second channel junction of the transistor, where the first and second channel junctions have different channel junction characteristics.

Abstract: Field-effect transistors (FETs) and methods of fabricating field-effect transistors are provided, with one or both of a source cavity or a drain cavity having different channel junction characteristics. The methods include, for instance, recessing a semiconductor material to form a cavity adjacent to a channel region of the transistor, the recessing defining a bottom channel interface surface and a sidewall channel interface surface within the cavity; providing a protective liner over the sidewall channel interface surface, with the bottom channel interface surface being exposed within the cavity; processing the bottom channel interface surface to facilitate forming a first channel junction of the transistor; and removing the protective liner from over the sidewall channel interface surface, and subsequently processing the sidewall channel interface surface to form a second channel junction of the transistor, where the first and second channel junctions have different channel junction characteristics.