Abstract: A programmably sliceable switch-fabric unit (PSSU) and methods of use are disclosed. An N×N? switch matrix is programmably made to operate as if it were a plurality of S×S? virtual switch slices, where S<N and S?<N?. Ingressing requests each specify an egress path (unicast mode) or plural egress paths (multicast mode) in terms of one or more relative egress port numbers. A request translator converts relative egress port numbers into absolute egress port numbers by determining what virtual slice each request belongs to. The translated egress requests are handed off to an arbitration and/or scheduling mechanism for further processing. If the translated request is granted, the corresponding payload egresses through the actual egress port(s) which the translated request asked for.

Abstract: In a system having independently-clocked job-performing circuits (e.g., payload processors) and independently-clocked job-ordering circuits (e.g., request and payload suppliers), coordinating mechanisms are provided for coordinating exchanges between the independently-clocked circuits. The coordinating mechanisms include those that use transmitted time-stamps for scheduling contention-free performances within the job-performing circuits of requested jobs. The coordinating mechanisms additionally or alternatively include static and dynamic rate constraining means that are configured to prevent a faster-clocked one of the independently-clocked circuits from overwhelming a more slowly-clocked other of the independently-clocked circuits. In one implementation, independently-clocked telecommunication-shelves house a distributed set of line cards and switch cards.