Abstract: An apparatus includes a first substrate comprising one or more first interconnection layers, wherein a first die is coupled to a first side of the first substrate, and a second substrate comprising one or more second interconnection layers. The second die may be coupled to a first side of the second substrate, and a third die is coupled to a second side of the second substrate. The first substrate and the second substrate may be stacked together.

Abstract: An interconnection element can include a substrate, e.g., a connection substrate, element of a package, circuit panel or microelectronic substrate, e.g., semiconductor chip, the substrate having a plurality of metal conductive elements such as conductive pads, contacts, bond pads, traces, or the like exposed at the surface. A plurality of solid metal posts may overlie and project away from respective ones of the conductive elements. An intermetallic layer can be disposed between the posts and the conductive elements, such layer providing electrically conductive interconnection between the posts and the conductive elements. Bases of the posts adjacent to the intermetallic layer can be aligned with the intermetallic layer.

Abstract: A method of forming a wall structure in a microelectronic assembly includes selectively depositing a flowable material on an upper surface of a first element in the microelectronic assembly, positioning a molding surface in contact with the deposited flowable material and controlling a distance between the upper surface of the first element and the molding surface with one or more objects positioned between the upper surface and the molding surface.

Abstract: A substrate including plural microelectronic device carriers has metallic alignment elements. The alignment elements desirably are disposed in a predetermined positional relationship to terminals on the carriers. The alignment elements are engaged with a carrier frame and a cutting device is aligned with the carrier frame. The cutting device cuts the carriers so that borders of the carriers are in a precise relationship with the terminals.

Abstract: A method of forming a wall structure in a microelectronic assembly includes selectively depositing a flowable material on an upper surface of a first element in the microelectronic assembly, positioning a molding surface in contact with the deposited flowable material and controlling a distance between the upper surface of the first element and the molding surface with one or more objects positioned between the upper surface and the molding surface.