Abstract: Described are various configurations of high-speed via structures. Various embodiments can reduce or entirely eliminate insertion loss in high-speed signal processing environments by using impedance compensation structures that decrease a mismatch in components of a circuit. An impedance compensation structure can include a metallic structure placed near a via to lower an impedance difference between the via and a conductive pathway connected to the via.

Abstract: Photonic and electronic integrated circuits can be cooled using variable conductance heat pipes containing a non-condensable gas in addition to a phase-changing working fluid. To package the heat pipe with a subassembly including the integrated circuits in a standard housing providing a heat sink contact area, the heat pipe is oriented, in some embodiments, with its axis between evaporator and condenser ends substantially perpendicular to the direction along which the integrated circuit subassembly is separated from the heat sink contact area, and a portion of the exterior surface of the heat pipe is thermally insulated, with a suitable thermal insulation structure, from the heat sink contact area.

Abstract: Photonic and electronic integrated circuits can be cooled using variable conductance heat pipes containing a non-condensable gas in addition to a phase-changing working fluid. To package the heat pipe with a subassembly including the integrated circuits in a standard housing providing a heat sink contact area, the heat pipe is oriented, in some embodiments, with its axis between evaporator and condenser ends substantially perpendicular to the direction along which the integrated circuit subassembly is separated from the heat sink contact area, and a portion of the exterior surface of the heat pipe is thermally insulated, with a suitable thermal insulation structure, from the heat sink contact area.

Abstract: Described are various configurations of high-speed via structures. Various embodiments can reduce or entirely eliminate insertion loss in high-speed signal processing environments by using impedance compensation structures that decrease a mismatch in components of a circuit. An impedance compensation structure can include a metallic structure placed near a via to lower an impedance difference between the via and a conductive pathway connected to the via.

Abstract: Photonic and electronic integrated circuits can be cooled using variable conductance heat pipes containing a non-condensable gas in addition to a phase-changing working fluid. To package the heat pipe with a subassembly including the integrated circuits in a standard housing providing a heat sink contact area, the heat pipe is oriented, in some embodiments, with its axis between evaporator and condenser ends substantially perpendicular to the direction along which the integrated circuit subassembly is separated from the heat sink contact area, and a portion of the exterior surface of the heat pipe is thermally insulated, with a suitable thermal insulation structure, from the heat sink contact area.

Abstract: Described are various configurations of high-speed via structures. Various embodiments can reduce or entirely eliminate insertion loss in high-speed signal processing environments by using impedance compensation structures that decrease a mismatch in components of a circuit. An impedance compensation structure can include a metallic structure placed near a via to lower an impedance difference between the via and a conductive pathway connected to the via.

Abstract: Photonic and electronic integrated circuits can be cooled using variable conductance heat pipes containing a non-condensable gas in addition to a phase-changing working fluid. To package the heat pipe with a subassembly including the integrated circuits in a standard housing providing a heat sink contact area, the heat pipe is oriented, in some embodiments, with its axis between evaporator and condenser ends substantially perpendicular to the direction along which the integrated circuit subassembly is separated from the heat sink contact area, and a portion of the exterior surface of the heat pipe is thermally insulated, with a suitable thermal insulation structure, from the heat sink contact area.

Abstract: Described are various configurations of high-speed via structures. Various embodiments can reduce or entirely eliminate insertion loss in high-speed signal processing environments by using impedance compensation structures that decrease a mismatch in components of a circuit. An impedance compensation structure can include a metallic structure placed near a via to lower an impedance difference between the via and a conductive pathway connected to the via.

Abstract: An example heatsink is operable as a multimode thermal switching heatsink and includes a housing that has a first heat transfer coefficient. The housing has a first heat transfer coefficient. The heatsink further includes a liquid in thermal communication with the housing and operatively positioned adjacent to a heat source. The liquid has a second heat transfer coefficient, which may be greater than the first heat transfer coefficient. In a first operating condition, the liquid has a first volume at a first thermal contact with the heat source, and, in a second operating condition, the liquid has a second volume and a second thermal contact with the heat source. The second thermal contact is greater than the first thermal contact, thereby enhancing dissipation of heat from the heat source in the second operating condition.

Abstract: A semiconductor package includes a semiconductor die, a lead frame and die attach paddle, and a thermally conductive metal foam porous sponge attached to the die attach paddle to conduct heat generated by operation of the die to the outside of the semiconductor package. In another embodiment the chip is mounted directly on the sponge. A flip-chip interconnection is also disclosed. In the method, a die and lead frame assembly is placed on a sponge in the cavity of a package two-part mold, the mold is closed and filled with encapsulant. A ball grid array semiconductor package with an internal sponge heatsink mounted directly on or in a substrate such as a printed circuit board with circuitry metallization, and a semiconductor die, wire-bonded or soldered to the metallization and adhered to the sponge heatsink, is also included.

Abstract: An improved flip-chip bond connection and bonding method uses a "press fit" bond between a set of bond pad bumps or projections on a semiconductor chip and corresponding set of substrate bumps or projections on a substrate to self-align the chip with the substrate and enable flip-chips to be inexpensively bonded to substrates or packages with greater accuracy and a smaller pad pitch than previously achieved. In the method after normally one of the sets of bond pad bumps or substrate bumps has been cooled to shrink or contract so that the facing surfaces of each of the pad bumps and substrate bumps can be interdigitated, the chip and substrate are moved together so that the respective bumps are in a substantially common plane. The one cooled set of bumps is then warmed to expand that set of bumps sufficiently to form a lateral press-fit force between the facing surfaces, physically securing and electrically connecting the respective sets of bumps.

Abstract: An improved flip-chip bond connection and bonding method uses a "press fit" bond between a set of bond pad bumps or projections on a semiconductor chip and corresponding set of substrate bumps or projections on a substrate to self-align the chip with the substrate and enable flip-chips to be inexpensively bonded to substrates or packages with greater accuracy and a smaller pad pitch than previously achieved. In the method after normally one of the sets of bond pad bumps or substrate bumps has been cooled to shrink or contract so that the facing surfaces of each of the pad bumps and substrate bumps can be interdigitated, the chip and substrate are moved together so that the respective bumps are in a substantially common plane. The one cooled set of bumps is then warmed to expand that set of bumps sufficiently to form a lateral press-fit force between the facing surfaces, physically securing and electrically connecting the respective sets of bumps.

Abstract: A conductive shield on the surface of an integrated circuit package improves the circuit and package performance. The conductive shield in the vicinity of the leads reduces lead inductance, thus increasing the frequency range of the package and reducing switching induced noise in digital circuits. The shield also blocks radio energy from entering or leaving the package through shielded area.