Abstract: An integrated circuit assembly may be formed comprising an electronic substrate, a first and second integrated circuit device each having a first surface, a second surface, at least one side extending between the first and second surface, and an edge defined at an intersection of the second surface and the at least one side of each respective integrated circuit device, wherein the first surface of each integrated circuit device is electrically attached to the electronic substrate, an underfill material between the first surface of each integrated circuit device and the electronic substrate, and between the sides of the first and second integrated circuit devices, and at least one barrier structure adjacent at least one of the edge of first integrated circuit device and the edge of the second integrated circuit device, wherein the underfill material abuts the at least one barrier structure.

Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.

Abstract: In some embodiments, an integrated circuit package includes a substrate and a heat spreader coupled to the substrate by fasteners. Thermal interface material thermally couples the die to the heat spreader. The heat spreader is provided over the die and is attached to the substrate with fasteners rather than a sealant-adhesive. Some examples of suitable fasteners may include rivets, barbed connectors, and gripping clips.

Abstract: A method is described for laser scribing or dicing portions of a workpiece using multi-source laser systems. In one embodiment, a first laser melts portions of the workpiece prior to a second laser ablating the portions of the workpiece.

Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.

Abstract: A laser micromachining method is disclosed wherein a workpiece is milled using an incident beam from a laser beam focused above the surface of the workpiece. The incident beam is guided by a plasma channel generated by the incident beam. The plasma channel, which has a relatively constant diameter over an extended distance, is generated by continual Kerr effect self-focusing balanced by ionization of air beam defocusing.

Abstract: A method is described for laser scribing or dicing portions of a workpiece using multi-source laser systems. In one embodiment, a first laser uses multiphoton absorption to lower the ablation threshold of portions of the workpiece prior to a second laser ablating the portions of the workpiece. In an alternative embodiment, a first laser uses high energy single-photon absorption to lower the ablation threshold of portions of the workpiece prior to a second laser ablating the portions of the workpiece.

Abstract: A combination of specific laser pulse durations and repetition rates are incorporated into a semiconductor wafer laser scribing/dicing process. The disclosed combination can reduce factors that contribute to thermal effects, explosive melting and evaporation, and laser/plasma interactions, thereby reducing problems with microcracks, delamination, and particles that can affect semiconductor die yields and reliability.

Abstract: In some embodiments, a method includes providing a composition which includes a base at least partially filled with filler particles and applying the composition as an underfill composition. At least some of the filler particles are electrically conductive.

Abstract: Apparatus and methods are provided wherein the reflowable electrically conductive interconnect material coupling the interconnects and/or land-side components of a microelectronic package is protected from elevated temperatures, such as those associated with reflow processes and environments which exceed the melting temperature of the interconnect material. One embodiment of the method provides covering the interconnect material about the interconnects and/or land-side components with heat-resistant curable material which protects the interconnect material from the elevated temperature and provides structural support to the interconnects and/or land-side components at the elevated temperature.

Abstract: In some embodiments, a method includes picking up a clip with a chuck, and, while holding the clip with the chuck, picking up an integrated circuit (IC) die with the IC die in contact with the clip.

Abstract: In some embodiments, a method includes providing a composition which includes a base at least partially filled with filler particles and applying the composition as an underfill composition. At least some of the filler particles are electrically conductive.

Abstract: A semiconductor die having a through via formed therein is disclosed. A first conductive layer is formed on the front side of the die and a second conductive layer is formed on the backside of the die, and coupled with the through via. A first package substrate is electrically coupled with the first conductive layer, and a second package substrate is electrically coupled with the second conductive layer. In another embodiment, a substrate ball electrically couples the first and second package substrates. In a further embodiment, a flip chip bump is attached to the first package substrate.

Abstract: A composition including an amount of at least one vinyl terminated polymer; an amount of at least one cross-linker comprising a terminal Si—H unit; an amount of at least one thermally conductive first filler, and at least one thermally conductive second filler, wherein a melting point of the first filler is greater than the melting point of the second filler. An apparatus including a package configured to mate with a printed circuit board; a semiconductor device coupled to the package; a thermal element; and a curable thermal material disposed between the thermal element and the semiconductor device.