Patents by Inventor Christopher S Ngai
Christopher S Ngai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7223526Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.Type: GrantFiled: December 21, 2004Date of Patent: May 29, 2007Assignee: Applied Materials, Inc.Inventors: Kevin Fairbairn, Michael Rice, Timothy Weidman, Christopher S Ngai, Ian Scot Latchford, Christopher Dennis Bencher, Yuxiang May Wang
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Patent number: 7105442Abstract: A method is described for decreasing the critical dimensions of integrated circuit features in which a first masking layer (101) is deposited, patterned and opened in the manner of typical feature etching, and a second masking layer (201) is deposited thereon prior to etching the underlying insulator. The second masking layer is advantageously coated in a substantially conformal manner. Opening the second masking layer while leaving material of the second layer on the sidewalls of the first masking layer as spacers leads to reduction of the feature critical dimension in the underlying insulator. Ashable masking materials, including amorphous carbon and organic materials are removable without CMP, thereby reducing costs. Favorable results are also obtained utilizing more than one masking layer (101, 301) underlying the topmost masking layer (302) from which the spacers are formed. Embodiments are also described in which slope etching replaces the addition of a separate spacer layer.Type: GrantFiled: May 22, 2002Date of Patent: September 12, 2006Assignee: Applied Materials, Inc.Inventors: Hongching Shan, Kenny L. Doan, Jingbao Liu, Michael S. Barnes, Hong D. Nguyen, Christopher Dennis Bencher, Christopher S. Ngai, Wendy H. Yeh, Eda Tuncel, Claes H. Bjorkman
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Patent number: 6946401Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.Type: GrantFiled: September 4, 2003Date of Patent: September 20, 2005Assignee: Applied Materials, Inc.Inventors: Judy H. Huang, Christopher Dennis Bencher, Sudha Rathi, Christopher S. Ngai, Bok Hoen Kim
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Patent number: 6841341Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.Type: GrantFiled: December 17, 2002Date of Patent: January 11, 2005Assignee: Applied Materials, Inc.Inventors: Kevin Fairbairn, Michael Rice, Timothy Weidman, Christopher S Ngai, Ian Scot Latchford, Christopher Dennis Bencher, Yuxiang May Wang
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Publication number: 20040046260Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.Type: ApplicationFiled: September 4, 2003Publication date: March 11, 2004Applicant: Applied Materials, Inc.Inventors: Judy H. Huang, Christopher Dennis Bencher, Sudha Rathi, Christopher S. Ngai, Bok Hoen Kim
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Patent number: 6700202Abstract: A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; reducing the oxidized interface and introducing second-layer-forming compounds to the hydrogen-containing plasma. A concomitant apparatus (i.e., a semiconductor device interface) has a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon.Type: GrantFiled: December 7, 2001Date of Patent: March 2, 2004Assignee: Applied Materials, Inc.Inventors: Judy H. Huang, Christopher Dennis Bencher, Sudha Rathi, Christopher S. Ngai, Bok Hoen Kim
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Patent number: 6656840Abstract: A method for forming a microelectronics device is disclosed. In one embodiment, the method includes depositing a conductive structure on a substrate. A first layer comprising silicon and nitrogen is formed on the substrate. A second layer comprising silicon and nitrogen is then formed on the first layer. The nitrogen to silicon ratio in the first layer is greater than the nitrogen to silicon ratio in the second layer.Type: GrantFiled: April 29, 2002Date of Patent: December 2, 2003Assignee: Applied Materials Inc.Inventors: Nagarajan Rajagopalan, Joe Feng, Christopher S Ngai, Meiyee (Maggie Le) Shek, Suketu A Parikh, Linh H Thanh
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Publication number: 20030219988Abstract: A method is described for decreasing the critical dimensions of integrated circuit features in which a first masking layer (101) is deposited, patterned and opened in the manner of typical feature etching, and a second masking layer (201) is deposited thereon prior to etching the underlying insulator. The second masking layer is advantageously coated in a substantially conformal manner. Opening the second masking layer while leaving material of the second layer on the sidewalls of the first masking layer as spacers leads to reduction of the feature critical dimension in the underlying insulator. Ashable masking materials, including amorphous carbon and organic materials are removable without CMP, thereby reducing costs. Favorable results are also obtained utilizing more than one masking layer (101, 301) underlying the topmost masking layer (302) from which the spacers are formed. Embodiments are also described in which slope etching replaces the addition of a separate spacer layer.Type: ApplicationFiled: May 22, 2002Publication date: November 27, 2003Applicant: Applied Materials, Inc.Inventors: Hongqing Shan, Kenny L. Doan, Jingbao Liu, Michael S. Barnes, Huong Thanh Nguyen, Christopher Dennis Bencher, Christopher S. Ngai, Wendy H. Yeh, Eda Tuncel, Claes H. Bjorkman
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Publication number: 20030203614Abstract: A method for forming a microelectronics device is disclosed. In one embodiment, the method includes depositing a conductive structure on a substrate. A first layer comprising silicon and nitrogen is formed on the substrate. A second layer comprising silicon and nitrogen is then formed on the first layer. The nitrogen to silicon ratio in the first layer is greater than the nitrogen to silicon ratio in the second layer.Type: ApplicationFiled: April 29, 2002Publication date: October 30, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Nagarajan Rajagopalan, Joe Feng, Christopher S. Ngai, Meiyee Shek, Suketu A. Parikh, Linh H. Thanh
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Patent number: 6573030Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.Type: GrantFiled: June 8, 2000Date of Patent: June 3, 2003Assignee: Applied Materials, Inc.Inventors: Kevin Fairbairn, Michael Rice, Timothy Weidman, Christopher S Ngai, Ian Scot Latchford, Christopher Dennis Bencher, Yuxiang May Wang
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Publication number: 20030091938Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.Type: ApplicationFiled: December 17, 2002Publication date: May 15, 2003Applicant: Applied Materials, Inc.Inventors: Kevin Fairbairn, Michael Rice, Timothy Weidman, Christopher S. Ngai, Ian Scot Latchford, Christopher Dennis Bencher, Yuxiang May Wang
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Publication number: 20020081856Abstract: A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; reducing the oxidized interface and introducing second-layer-forming compounds to the hydrogen-containing plasma. A concomitant apparatus (i.e., a semiconductor device interface) has a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon.Type: ApplicationFiled: December 7, 2001Publication date: June 27, 2002Inventors: Judy H. Huang, Christopher Dennis Bencher, Sudha Rathi, Christopher S. Ngai, Bok Hoen Kim
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Patent number: 6355571Abstract: A method and apparatus for reducing oxidation of an interface of a semiconductor device thereby improving adhesion of subsequently formed layers and/or devices is disclosed. The semiconductor device has at least a first layer and a second layer wherein the interface is disposed between said first and second layers. The method includes the steps of providing the first layer having a partially oxidized interface; introducing a hydrogen-containing plasma to the interface; reducing the oxidized interface and introducing second-layer-forming compounds to the hydrogen-containing plasma. A concomitant apparatus (i.e., a semiconductor device interface) has a first insulating layer, one or more conductive devices disposed within the insulating layer, the insulating layer and conductive devices defining the interface, wherein the interface is treated with a continuous plasma treatment to remove oxidation and deposit a second layer thereupon.Type: GrantFiled: July 30, 1999Date of Patent: March 12, 2002Assignee: Applied Materials, Inc.Inventors: Judy H. Huang, Christopher Dennis Bencher, Sudha Rathi, Christopher S. Ngai, Bok Hoen Kim