Abstract: A fluid end for use with a power end. The fluid end comprises a plurality of fluid end sections positioned adjacent one another. Each section includes a single horizontally positioned bore. A plunger is installed within the bore and includes a fluid passageway. Low-pressure fluid enters the bore through the plunger and high-pressure fluid exits the fluid end through an outlet valve installed within the bore. The intake of low-pressure fluid within the fluid end section is regulated by an inlet valve installed within the plunger. Low pressure fluid enters the plunger through an inlet component attached to both the plunger and an inlet manifold.

Abstract: A fluid routing plug for use with a fluid end section. The fluid end section being one of a plurality of fluid end sections making up a fluid end side of a high pressure pump. The fluid routing plug is installed within a horizontal bore formed in a fluid end section and is configured to route fluid between an intake and discharge bore. The fluid routing plug comprises a plurality of first and second fluid passages. The first and second passages do not intersect and are offset from one another. The first fluid passages are configured to direct fluid delivered to the horizontal bore from intake bores towards a reciprocating plunger. The second fluid passages are configured to direct fluid pressurized by the plunger towards a discharge bore.

Abstract: A fluid end assembly comprising a housing having multiple conduits formed therein. A tubular sleeve is installed within one of the conduits and is configured to house a plurality of packing seals. A seal is installed within a groove formed in the walls of the housing surrounding the tubular sleeve such that the seal engages an outer surface of the tubular sleeve.

Abstract: A fluid routing plug for use with a fluid end section. The fluid end section being one of a plurality of fluid end sections making up a fluid end side of a high pressure pump. The fluid routing plug is installed within a horizontal bore formed in a fluid end section and is configured to route fluid between an intake and discharge bore. The fluid routing plug comprises a plurality of first and second fluid passages. The first and second passages do not intersect and are offset from one another. The first fluid passages are configured to direct fluid delivered to the horizontal bore from intake bores towards a reciprocating plunger. The second fluid passages are configured to direct fluid pressurized by the plunger towards a discharge bore.

Abstract: A fluid end for use with a power end. The fluid end comprises a plurality of fluid end sections positioned adjacent one another. Each section includes a single horizontally positioned bore. A plunger is installed within the bore and includes a fluid passageway. Low-pressure fluid enters the bore through the plunger and high-pressure fluid exits the fluid end through an outlet valve installed within the bore. The intake of low-pressure fluid within the fluid end section is regulated by an inlet valve installed within the plunger. Low-pressure fluid enters the plunger through an inlet component attached to both the plunger and an inlet manifold.

Abstract: A fluid end for use with a power end. The fluid end comprises a plurality of fluid end sections positioned adjacent one another. Each section includes a single horizontally positioned bore. A plunger is installed within the bore and includes a fluid passageway. Low-pressure fluid enters the bore through the plunger and high-pressure fluid exits the fluid end through an outlet valve installed within the bore. The intake of low-pressure fluid within the fluid end section is regulated by an inlet valve installed within the plunger. Low-pressure fluid enters the plunger through an inlet component attached to both the plunger and an inlet manifold.

Abstract: The present disclosure provides for endonuclease enzymes having distinguishing domain features, as well as methods of using such enzymes or variants thereof.

Abstract: A high pressure pump comprising a fluid end mechanically coupled to a power end. The power end is modular and comprises a crankshaft section, a crosshead section, and a connector section coupled together by a first set of stay rods. The fluid end comprises a plurality of fluid end sections positioned in a side-by-side relationship. Each of the plurality of fluid end sections are attached to the power end using a plurality of second set of stay rods.

Abstract: A fluid routing plug for use with a fluid end section. The fluid end section being one of a plurality of fluid end sections making up a fluid end side of a high pressure pump. The fluid routing plug is installed within a horizontal bore formed in a fluid end section and is configured to route fluid between an intake and discharge bore. The fluid routing plug comprises a plurality of first and second fluid passages. The first and second passages do not intersect and are offset from one another. The first fluid passages are configured to direct fluid delivered to the horizontal bore from intake bores towards a reciprocating plunger. The second fluid passages are configured to direct fluid pressurized by the plunger towards a discharge bore.

Abstract: A fluid end for use with a power end. The fluid end comprises a plurality of fluid end sections positioned adjacent one another. Each section includes a single horizontally positioned bore. A plunger is installed within the bore and includes a fluid passageway. Low-pressure fluid enters the bore through the plunger and high-pressure fluid exits the fluid end through an outlet valve installed within the bore. The intake of low-pressure fluid within the fluid end section is regulated by an inlet valve installed within the plunger. Low-pressure fluid enters the plunger through an inlet component attached to both the plunger and an inlet manifold.

Abstract: A processor includes a processing pipeline, a plurality of result-storage elements, and writeback logic. The processing pipeline is configured to process program operations and to write, to a result storage, up to a predefined maximal number of results of the processed program operations per clock cycle. The result-storage elements are configured to store respective ones of the results. The writeback logic is configured to (i) detect a writeback conflict event in which the processing pipeline produces simultaneous results that exceed the predefined maximal number of results, for writing to the result storage, in a same clock cycle, (ii) in response to detecting the writeback conflict event, to temporarily store at least a given result, from among the simultaneous results, in a given result-storage element, and (iii) to subsequently write the temporarily-stored given result from the given result-storage element to the result storage.

Abstract: A processor includes a processing pipeline, a plurality of result-storage elements, and writeback logic. The processing pipeline is configured to process program operations and to write, to a result storage, up to a predefined maximal number of results of the processed program operations per clock cycle. The result-storage elements are configured to store respective ones of the results. The writeback logic is configured to (i) detect a writeback conflict event in which the processing pipeline produces simultaneous results that exceed the predefined maximal number of results, for writing to the result storage, in a same clock cycle, (ii) in response to detecting the writeback conflict event, to temporarily store at least a given result, from among the simultaneous results, in a given result-storage element, and (iii) to subsequently write the temporarily-stored given result from the given result-storage element to the result storage.

Abstract: In some embodiments, a system includes a register file, a plurality of clock gating circuits, a free list circuit, and a register allocation adjustment circuit. The register file includes a plurality of registers. The clock gating circuits control receipt of a clock signal at respective regions of registers. The free list circuit performs multiple search operations in parallel to identify unallocated registers. The register allocation adjustment circuit implements a mapping between registers identified by the free list circuit and registers of the register file such that the multiple search operations identify whether registers of a first region are unallocated prior to identifying whether registers of a second region are unallocated. As a result, a region of the register file is less likely to be in use during a particular clock cycle and a clock gating circuit may prevent a clock signal from being received at the region.

Abstract: In some embodiments, a register file circuit design process includes instructing an automated integrated circuit design program to generate a register file circuit design, including providing a cell circuit design and instructing the automated integrated circuit design program to generate a selection design, a pre-decode design, and a data gating design. The cell circuit design describes a plurality of selection circuits that have a particular arrangement. The selection design describes a plurality of replica circuits that include respective pluralities of selection circuits having the particular arrangement. The pre-decode design describes a pre-decode circuit configured to identify a plurality of entries identified by a portion of a write instruction. The data gating design describes data gating circuits configured, in response to the pre-decode circuit not identifying respective entries, to disable data inputs to respective write selection circuits connected to the respective entries.

Abstract: In some embodiments, a register file circuit design process includes instructing an automated integrated circuit design program to generate a register file circuit design, including providing a cell circuit design and instructing the automated integrated circuit design program to generate a selection design, a pre-decode design, and a data gating design. The cell circuit design describes a plurality of selection circuits that have a particular arrangement. The selection design describes a plurality of replica circuits that include respective pluralities of selection circuits having the particular arrangement. The pre-decode design describes a pre-decode circuit configured to identify a plurality of entries identified by a portion of a write instruction. The data gating design describes data gating circuits configured, in response to the pre-decode circuit not identifying respective entries, to disable data inputs to respective write selection circuits connected to the respective entries.

Abstract: An apparatus for making a crystal pre-melt includes a hermetically-sealed muffle furnace made of a non-porous refractory material, at least one port for entry and exit of gaseous substance within the muffle furnace, a temperature-controlled zone defined inside the muffle furnace, and a crucible for holding crystal raw material in solid or molten form inside the muffle furnace. The crystal pre-melt is made by disposing crystal raw material in loose powder, pressed powder, granular, or densified form in the temperature-controlled zone, heating the temperature-controlled zone to a treatment temperature that enables reaction between a fluorinating agent and oxides in the crystal raw material, reacting the fluorinating agent with the crystal raw material to produce volatile gases, removing the volatile gases from the muffle furnace, heating the crystal raw material to form a melt, and solidifying the melt to form the crystal pre-melt.

Abstract: A method of monitoring logical connections in a computer network is described. All packets exchanged via the network are intercepted and analyzed. Upon receipt of a packet, a connection management engine determines whether packet is part of an existing logical connection. If it is not, a new record is created and stored in a connection record database. Otherwise, the existing record for the logical connection in the connection record database is updated. Also described is a method of monitoring file transfers in a computer network. File transfers are monitored using an file transfer record database, which allows each packet of the file transfer to be placed in proper context. Upon interception of a packet, an application management engine (AME) first determines whether the packet is part of a file transfer. If it is not, the AME ignores the packet.

Abstract: A method of monitoring logical connections in a computer network is described. All packets exchanged via the network are intercepted and analyzed. Upon receipt of a packet, a connection management engine determines whether packet is part of an existing logical connection. If it is not, a new record is created and stored in a connection record database. Otherwise, the existing record for the logical connection in the connection record database is updated.Also described is a method of monitoring file transfers in a computer network. File transfers are monitored using an file transfer record database, which allows each packet of the file transfer to be placed in proper context. Upon interception of a packet, an application management engine (AME) first determines whether the packet is part of a file transfer. If it is not, the AME ignores the packet.