Patents by Inventor Christopher W. Schuermyer

Christopher W. Schuermyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10769347
    Abstract: A Physical Fault Analysis (PFA) outcome prediction tool utilizes previously-generated evaluation data and associated PFA outcome data to generate a Bayesian Generalized Linear Model (BGLM), and then utilizes the BGLM to generate a PFA outcome prediction for newly-submitted evaluation data that operably characterizes measured operating characteristics of an IC chip that is being developed. The BGLM generation methodology by utilizing a Generalized Linear Model (GLM) in a Bayesian framework to form a hierarchical model representing the evaluation data and associated PFA outcome data as a linear combination. The PFA outcome prediction includes a credible interval of a posterior distribution that effectively represents a cross-sectional portion of the BGLM corresponding to the newly-submitted evaluation data.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: September 8, 2020
    Assignee: Synopsys, Inc.
    Inventor: Christopher W. Schuermyer
  • Patent number: 9703658
    Abstract: Systems and techniques for identifying failure mechanisms based on a population of scan diagnostic reports is described. Given a population of scan diagnostic reports, a mixed membership model can be used for computing a topic distribution for each portion of each scan diagnostic report and a feature distribution for each topic. The failure mechanisms can be identified based on the topic distributions for the portions of the scan diagnostic reports and the feature distributions for the topics.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 11, 2017
    Assignee: SYNOPSYS, INC.
    Inventors: Christopher W. Schuermyer, Karen Movsisyan
  • Publication number: 20170052861
    Abstract: Systems and techniques for identifying failure mechanisms based on a population of scan diagnostic reports is described. Given a population of scan diagnostic reports, a mixed membership model can be used for computing a topic distribution for each portion of each scan diagnostic report and a feature distribution for each topic. The failure mechanisms can be identified based on the topic distributions for the portions of the scan diagnostic reports and the feature distributions for the topics.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 23, 2017
    Applicant: SYNOPSYS, INC.
    Inventors: Christopher W. Schuermyer, Karen Movsisyan
  • Patent number: 9135103
    Abstract: Aspects of the invention relate to techniques for classifying memory failure bitmaps using both rule-based classification and artificial neural network-based classification methods. The rule-based classification method employs classification rules comprising those for global failure patterns. The artificial neural network-based classification method classifies local failure patterns. One of the artificial neural network models is the Kohonen self-organizing map model. The input vector for a failure pattern may contain four elements: pattern aspect ratio, failing bit ratio, dominant failing column number and dominant failing row number.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: September 15, 2015
    Assignee: Mentor Graphics Corporation
    Inventors: Yu Huang, Wu-Tung Cheng, Christopher W. Schuermyer
  • Publication number: 20100229061
    Abstract: Cell-aware fault models directly address layout-based intra-cell defects. They are created by performing analog simulations on the transistor-level netlist of a library cell and then by library view synthesis. The cell-aware fault models may be used to generate cell-aware test patterns, which usually have higher defect coverage than those generated by conventional ATPG techniques. The cell-aware fault models may also be used to improve defect coverage of a set of test patterns generated by conventional ATPG techniques.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 9, 2010
    Inventors: Friedrich HAPKE, Rene Krenz-Baath, Andreas Glowatz, Juergen Schloeffel, Peter Weseloh, Michael Wittke, Mark A. Kassab, Christopher W. Schuermyer
  • Publication number: 20080052029
    Abstract: A method of retrieving a unique, repeatable identification value from an integrated circuit by identifying a plurality of state elements within the integrated circuit, where the state elements are part of standard functional circuitry within the integrated circuit, and are not part of a specialized circuit designed to primarily produce the unique, repeatable identification value, performing an initializing process on the state elements to bring the state elements to repeatable states, where the repeatable states of different state elements are dependent at least in part on differences between the different state elements, reading the repeatable states on the state elements, and joining the repeatable states into a binary number as the unique, repeatable identification value.
    Type: Application
    Filed: August 24, 2006
    Publication date: February 28, 2008
    Applicant: LSI LOGIC CORPORATION
    Inventors: Robert B. Benware, Mark A. Ward, Christopher W. Schuermyer