Abstract: A manufacturing method of a semiconductor device having metal gate includes providing a substrate having a first semiconductor device, a second semiconductor device, and a first insulating layer covering the first semiconductor device and the second semiconductor device formed thereon, performing an etching process to remove a portion of the first insulating layer to expose a portion of the first semiconductor device and the second semiconductor device, forming a second insulating layer covering the first semiconductor device and the second semiconductor device, performing a first planarization process to remove a portion of the second insulating layer, forming a first gate trench and a second gate trench respectively in the first semiconductor device and the second semiconductor device, and forming a first metal gate and a second metal gate respectively in the first gate trench and the second gate trench.

Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate; a gate structure disposed on the substrate; a first spacer disposed on a sidewall of the gate structure; a second spacer disposed around the first spacer, wherein the second spacer comprises a L-shaped cap layer and a cap layer on the L-shaped cap layer; a source/drain disposed in the substrate adjacent to two sides of the second spacer; and a CESL disposed on the substrate to cover the gate structure, wherein at least part of the second spacer and the CESL comprise same chemical composition and/or physical property.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon; forming a first cap layer on a surface of the substrate and sidewall of the gate structure; forming a second cap layer on the first cap layer; forming a third cap layer on the second cap layer; performing an etching process to partially remove the third cap layer, the second cap layer, and the first cap layer to form a first spacer and a second spacer on the sidewall of the gate structure; and forming a contact etch stop layer (CESL) on the substrate to cover the second spacer, wherein the third cap layer and the CESL comprise same deposition condition.

Abstract: A manufacturing method of a semiconductor device having metal gate includes providing a substrate having a first semiconductor device, a second semiconductor device, and a first insulating layer covering the first semiconductor device and the second semiconductor device formed thereon, performing an etching process to remove a portion of the first insulating layer to expose a portion of the first semiconductor device and the second semiconductor device, forming a second insulating layer covering the first semiconductor device and the second semiconductor device, performing a first planarization process to remove a portion of the second insulating layer, forming a first gate trench and a second gate trench respectively in the first semiconductor device and the second semiconductor device, and forming a first metal gate and a second metal gate respectively in the first gate trench and the second gate trench.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon; forming a first cap layer on a surface of the substrate and sidewall of the gate structure; forming a second cap layer on the first cap layer; forming a third cap layer on the second cap layer; performing an etching process to partially remove the third cap layer, the second cap layer, and the first cap layer to form a first spacer and a second spacer on the sidewall of the gate structure; and forming a contact etch stop layer (CESL) on the substrate to cover the second spacer, wherein the third cap layer and the CESL comprise same deposition condition.