Patents by Inventor Chuan Yu
Chuan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240178268Abstract: A capacitor structure including a substrate, a capacitor, a second dielectric layer, a first conductive layer, and a second conductive layer is provided. The capacitor includes first electrode layers, at least one second electrode layer, and a first dielectric layer. The first electrode layers and the at least one second electrode layer are alternately disposed on the substrate. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The second dielectric layer has first openings and at least one second opening. The first openings expose the first electrode layers. The second opening exposes the second electrode layer. The first conductive layer is electrically connected to the first electrode layers. The first conductive layer is a single conductive layer disposed on the second dielectric layer and extending into the first openings. The second conductive layer is electrically connected to the second electrode layer.Type: ApplicationFiled: January 12, 2023Publication date: May 30, 2024Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Wei-Yu Lin, Chuan-Chieh Lin
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Publication number: 20240164649Abstract: A physiological signal measuring method includes a training's thermal image providing step, a training step, a classification model generating step, a measurement's thermal image providing step, a mask-wearing classifying step, a block identifying step and a measurement result generating step. The measurement's thermal image providing step includes providing a measurement's thermal image, which is an infrared thermal video for measuring. The measurement result generating step includes generating a measurement result of at least one physiological parameter of the subject according to a plurality of signals of the forehead block, and the mask block or the nasal cavity block.Type: ApplicationFiled: May 28, 2023Publication date: May 23, 2024Inventors: Chuan-Yu CHANG, Yen-Qun GAO
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Publication number: 20240148999Abstract: A patient interface including a plenum chamber, a first seal-forming structure for forming a seal around the patient's mouth, and a second seal-forming structure for forming a seal around the patient's nares. The patient interface further includes at least one stopper rib disposed in the cavity of the plenum chamber spaced apart from the first seal-forming structure in a rest position. The first seal-forming structure configured to contact the at least one stopper rib in an operational position. The at least one stopper rib configured to oppose compression of the first seal-forming structure in an anterior direction. The second seal-forming structure is not configured to contact the at least one stopper rib.Type: ApplicationFiled: March 9, 2022Publication date: May 9, 2024Inventors: Marvin Sugi HARTONO, Kyi Thu MAUNG, Lik Tze SEET, Jing CHEN, Beng Hai TAN, Han Cheng LIN, Chuan Foong LEE, Xiang Yu ONG, Shiva Kumar SHANMUGA SUNDARA, Hugh Francis Stewart THOMAS, Sebastien DEUBEL, Chee Keong ONG, Andrew James BATE, Matthew Robin WELLS, Paul Derrick WATSON, Shannon William PRIOR
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Patent number: 11978773Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.Type: GrantFiled: March 25, 2021Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
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Patent number: 11972072Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.Type: GrantFiled: November 1, 2022Date of Patent: April 30, 2024Assignee: InnoLux CorporationInventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
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Publication number: 20240128157Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.Type: ApplicationFiled: July 25, 2022Publication date: April 18, 2024Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Publication number: 20240117451Abstract: Positive reference spiked in collected sample for use in qualitatively and quantitatively detecting viral RNA.Type: ApplicationFiled: March 10, 2021Publication date: April 11, 2024Inventors: Shuwei YANG, Liancheng HUANG, Feifei FENG, Longwen SU, Kun LIN, Can TANG, Chen LIANG, Yuanmei WANG, Yanqing CAI, Yilin PANG, Chuan SHEN, Zhixue YU
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Patent number: 11955552Abstract: A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface. The structure also includes a dielectric layer having a continuous surface in contact with the entire second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature. The structure also includes a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer, and a gate electrode layer surrounding a portion of the semiconductor layer.Type: GrantFiled: November 14, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Li-Zhen Yu, Huan-Chieh Su, Shih-Chuan Chiu, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
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Patent number: 11956151Abstract: A transmission control protocol (TCP) flow control method is provided, which comprises: sending a data packet from a packet processor to a receiver and storing a copy of the data packet; receiving a current ACK packet with a current packet number; determining whether the current packet number is identical to a last packet number and whether a last substitute ACK packet generated by the input ACK filter exists; and performing steps respectively corresponding to different results of this determination to avoid TCP congestion control timely. A TCP flow control device performing the method is also disclosed.Type: GrantFiled: December 22, 2021Date of Patent: April 9, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Po-Jui Tsao, Chuan-Yu Cho, Chun-Chieh Huang
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Patent number: 11955515Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.Type: GrantFiled: July 28, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
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Publication number: 20240108592Abstract: Provided is a method for treating cancer by administering to a subject in need thereof with a pharmaceutical composition including a benzenesulfonamide derivative in combination with a cancer immunotherapeutic agent such as the immune check point inhibitor (ICI).Type: ApplicationFiled: September 19, 2023Publication date: April 4, 2024Applicant: Gongwin Biopharm Co., LtdInventors: Shun-Chi WU, Chuan-Ching YANG, Zong-Yu YANG, Chia-En LIN, Mao-Yuan LIN
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Publication number: 20240114614Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.Type: ApplicationFiled: September 29, 2022Publication date: April 4, 2024Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
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Patent number: 11948930Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.Type: GrantFiled: November 13, 2020Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Publication number: 20240105937Abstract: Provided is a production method of a high-rate lithium iron phosphate positive electrode material comprising first, weighing an iron source and a lithium source in a molar ratio of 1:1-1:1.05, then weighing 5-15% of carbon source and 0-1% of metal ion doping agent based on the total mass of the iron source and lithium source, adding water to the above weighed materials, ball milling and sand grinding the obtained slurry, so that the D50 after the sand grinding is controlled to be 100-200 nm, then spraying the mixture to obtain a precursor, putting the precursor into a sintering furnace for sintering at 650-700° C. under the protection of nitrogen gas, cooling to obtain a sintered material, then pulverizing the sintered material, sieving the pulverized material and removing iron to obtain the lithium iron phosphate. The prepared lithium iron phosphate has a good rate capability and a good cycle stability.Type: ApplicationFiled: July 8, 2022Publication date: March 28, 2024Applicant: HUBEI WANRUN NEW ENERGY TECHNOLOGY CO., LTD.Inventors: Jiaojiao YANG, Qin WANG, Guozhang CHENG, Chuan GAO, Xu ZHAO, Suixi YU
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Publication number: 20240096855Abstract: A method of wafer-level manufacturing of an optical package (285) is disclosed. The method comprises forming an apertured substrate (170; 405) by a process of vacuum injection molding, each aperture (175A; 175B) in the apertured substrate configured to support an optical element (225; 420; 425). The method also comprises coupling the apertured substrate to a further substrate (255) comprising optical devices (260, 265) aligned with the apertures in the apertured substrate. Also disclosed is optical package (285, 600) formed according to the method and an apparatus, such as a smartphone, comprising the optical package.Type: ApplicationFiled: December 8, 2021Publication date: March 21, 2024Applicant: ams-OSRAM Asia Pacific Pte. Ltd.Inventors: Zhen Kai NAM, Qi Chuan YU, Kam Wah LEONG, Yeu Woon CHAN, Royce VIRINTHORN, Sundar Raman GNANA SAMBANDAM, Zhang Xin SUN
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Patent number: 11929261Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The substrate is singulated to form dies. The first side of the dies are attached to a carrier. The dies are thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the dies. A device die is bonded to the second connectors. The dies and device dies are singulated into multiple packages.Type: GrantFiled: November 13, 2020Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Patent number: 11923358Abstract: A device comprises a first transistor, a second transistor, a first contact, and a second contact. The first transistor comprises a first gate structure, first source/drain regions on opposite sides of the first gate structure, and first gate spacers spacing the first gate structure apart from the first source/drain regions. The second transistor comprises a second gate structure, second source/drain regions on opposite sides of the second gate structure, and second gate spacers spacing the second gate structure apart from the second source/drain regions. The first contact forms a first contact interface with one of the first source/drain regions. The second contact forms a second contact interface with one of the second source/drain regions. An area ratio of the first contact interface to top surface the first source/drain region is greater than an area ratio of the second contact interface to top surface of the second source/drain region.Type: GrantFiled: July 28, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chung-Pin Huang, Hou-Yu Chen, Chuan-Li Chen, Chih-Kuan Yu, Yao-Ling Huang
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Publication number: 20240066556Abstract: A device for separating and recovering flat-plate catalyst powder and a method for determining a wear ratio are provided. The device includes a powder separation unit and a powder recovery unit, a powder accumulation bin is respectively connected with a shell and a catalyst powder outlet, a cyclone outlet is configured on an inner side of a recovery shell, and a primary filter and a secondary filter are configured on an inner side wall of the recovery shell.Type: ApplicationFiled: June 29, 2023Publication date: February 29, 2024Inventors: Yingjie Bao, Jieyong Hao, Changkai Yu, Xun Wu, Xianchun Zhou, Yanxuan Liang, Rongfu Tang, Feiyun Chen, Bin Luo, Kaiyou Liao, Danping Zhang, Chao Li, Fanhai Kong, Lele Wang, Qiang Bao, Chuan He
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Patent number: 11876876Abstract: Various embodiments of the teachings herein include methods for implementing communication conversion between a server-client system and a publish-subscribe (pub-sub) system. An example may include: receiving a message from the pub-sub system, wherein a topic of the message includes information related to a target service in the server-client system to which the message is to be sent, and a payload of the message includes identification information of a consumer in the pub-sub system, wherein the consumer is to receive a response message from the server-client system; parsing the message to determine a host and a service provider that provide the target service, and the consumer who is to receive the response message; sending a request message for the target service to the service provider on the determined host; receiving the response message; adding the identification information to the response message; and sending it to the pub-sub system.Type: GrantFiled: May 28, 2020Date of Patent: January 16, 2024Assignee: SIEMENS AKTIENGESELLSCHAFTInventors: Dong Li, Xiao Bo Yang, Yao Lei Kang, Tong Zhou Wang, Chuan Yu Zhang, Jian Yong Zhang
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Patent number: 11835621Abstract: A blind spot detection system with speed detection function and device and method thereof are provided. The system is disposed on the rear portion of the vehicle, and includes a signal transceiving module and a central processing unit. The central processing unit includes a speed calculation module and an object detection module. The device includes a main body in which the signal transceiving module is disposed. A first signal is sent toward a detection area behind the vehicle for acquiring a second signal for blind spot detection. By calculation based on the second signal, a third signal is acquired for identifying the static and moving objects, and the relative speed between the vehicle and the static object is determined as the speed of the vehicle. Therefore, the blind spot detection system has a speed detection function.Type: GrantFiled: October 1, 2020Date of Patent: December 5, 2023Assignees: CUB ELECPARTS INC., CUBTEK INC.Inventors: San-Chuan Yu, Hsiao-Ning Wang, Ya-Ling Chi, Chun-Jie Hsu, Te-Yu Lu