Patents by Inventor Chuang Zhang
Chuang Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240152474Abstract: An on-chip integrated circuit, a data processing device and a method are provided. The on-chip integrated circuit includes: a processor circuit and an accelerator circuit. The processor circuit includes a processor and a data storage area, the processor is connected to the data storage area through a first bus in the processor circuit. The accelerator circuit includes an accelerator and a second bus, the accelerator is connected to the second bus, and the second bus is bridged with the first bus corresponding to the data storage area, to perform data interaction between the accelerator and the data storage area, which can reduce the congestion on a bus of the processor and improve the quality of service of the application.Type: ApplicationFiled: January 17, 2024Publication date: May 9, 2024Inventors: Yimin CHEN, Shan LU, Chuang ZHANG, Junmou ZHANG, Yuanlin CHENG, Jian WANG
-
Patent number: 11968659Abstract: The present disclosure provides a method of scheduling for a UE. The method includes dividing M UEs into N groups, wherein a distance metric between each UE in a group and the center of the group does not exceed a first predetermined threshold, where M and N are positive integers; pairing the N groups, wherein a distance metric between centers of the two paired groups is greater than a second predetermined threshold; and in a case where there is a group paired with a group to which a first UE for which scheduling is to be performed belongs, scheduling transmissions in different directions respectively for the first UE and the second UE from the paired group on the same time-frequency resource. The present disclosure also provides a signal transmission method, a base station, a UE and a computer readable medium.Type: GrantFiled: August 20, 2019Date of Patent: April 23, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Chuang Zhang, Di Su, Peng Lin, Chen Qian, Bin Yu
-
Publication number: 20240127001Abstract: Techniques for audio understanding using fixed language models are provided. In one aspect, a system for performing audio understanding tasks includes: a fixed text embedder for, on receipt of a prompt sequence having (e.g., from 0-10) demonstrations of an audio understanding task followed by a new question, converting the prompt sequence into text embeddings; a pretrained audio encoder for converting the prompt sequence into audio embeddings; and a fixed autoregressive language model for answering the new question using the text embeddings and the audio embeddings. A method for performing audio understanding tasks is also provided.Type: ApplicationFiled: October 12, 2022Publication date: April 18, 2024Inventors: Kaizhi Qian, Yang Zhang, Chuang Gan, Bo Wu, Zhenfang Chen
-
Patent number: 11962082Abstract: Disclosed is a multifunctional GNSS antenna belonging to the technical field of communication technology, comprising: a PCB, a first dielectric plate, and a first radiating component arranged in sequence, wherein the PCB is connected with the first radiating component by a first feeding component, a second radiating component and a plurality of metalized vias are arranged on the first dielectric plate, the second radiating component is connected with the PCB by a second feeding component, the plurality of metalized vias are arranged around the first radiating component, and the second radiating component is arranged on an outer side of the plurality of metalized vias. The metalized vias increase the capacitive coupling and form the protection for the first radiating component located therein, which reduces the signal interference and coupling of the third radiating component to the first radiating component effectively, which is conducive to implementation miniaturization of the antenna.Type: GrantFiled: April 26, 2021Date of Patent: April 16, 2024Assignee: HARXON CORPORATIONInventors: Chuang Zhang, Jie Zhang, Xiaohui Wang
-
Publication number: 20240095435Abstract: A method, system, and computer program product for circuit design automation. The method identifies a set of circuit components for a proposed circuit design. A subset of circuit components is selected to generate an initial topology for the proposed circuit design. A set of subsequent topologies are iteratively generated by a heuristic search algorithm based on the subset of circuit components and the initial topology. A set of valid topologies of the set of subsequent topologies are determined by a circuit simulator based on the subset of circuit components and a set of connections within the set of subsequent topologies. The method generates the proposed circuit design from the set of valid topologies.Type: ApplicationFiled: September 15, 2022Publication date: March 21, 2024Inventors: Shun Zhang, Xin Zhang, Shaoze Fan, Ningyuan Cao, Jing Li, Xiaoxiao Guo, Chuang Gan
-
Patent number: 11936799Abstract: A method for blockchain-based time stamping for digital signature is disclosed. The method includes two participants: a signer who signs a message, a verifier who verifies the message. In the method, the signer obtains hash values of a certain number of latest confirmed blocks in blockchain, binds these hash values and the message together to be a new message. The signer then generates a signature of the new message and inserts identification data of this signature and the new message into a transaction of blockchain. This method ensures that the generation time of the signature is prior to the generation time of the block which contains the signature and, at the same time, is after the generation time of the blocks whose hash values are included in the signature, which produces an accurate time interval for the digital signature.Type: GrantFiled: September 25, 2020Date of Patent: March 19, 2024Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINAInventors: Chunxiang Xu, Chuang Li, Yuan Zhang
-
Publication number: 20240086518Abstract: Embodiments of this application provide a packet transmission method and apparatus, and relate to the field of communication technologies. When the packet transmission method is applied, a first packet may be determined by using a first device, where packet fields of the first packet include an authentication identifier field, an authentication code field, and at least one candidate authentication field, and the authentication identifier field indicates a field that is in the at least one candidate authentication field and that corresponds to the authentication code field; and then the first packet is sent.Type: ApplicationFiled: November 10, 2023Publication date: March 14, 2024Inventors: Weiyu JIANG, Fei YANG, Bingyang LIU, Daode ZHANG, Chuang WANG
-
Publication number: 20240081051Abstract: Aspects of the disclosure provide a semiconductor device. The semiconductor device includes a memory stack of gate layers and insulating layers. The gate layers and the insulating layers are stacked alternatingly and are formed into stair steps in a staircase region. The semiconductor device includes a first landing pad on a first gate layer of a first stair step. The first gate layer is a top gate layer of the first stair step. The semiconductor device further includes a first sidewall isolation structure on a riser sidewall of a second gate layer of a second stair step. The second gate layer is a top gate layer of the second stair step and is stacked on the first gate layer in the memory stack. The first sidewall isolation structure isolates the second gate layer from the first landing pad.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhen GUO, Wei XU, Bin YUAN, Chuang MA, Jiashi ZHANG, ZongLiang HUO
-
Patent number: 11914540Abstract: An on-chip integrated circuit, a data processing device and a method are provided. The on-chip integrated circuit includes: a processor circuit and an accelerator circuit. The processor circuit includes a processor and a data storage area, the processor is connected to the data storage area through a first bus in the processor circuit. The accelerator circuit includes an accelerator and a second bus, the accelerator is connected to the second bus, and the second bus is bridged with the first bus corresponding to the data storage area, to perform data interaction between the accelerator and the data storage area, which can reduce the congestion on a bus of the processor and improve the quality of service of the application.Type: GrantFiled: May 5, 2022Date of Patent: February 27, 2024Assignee: Lemon Inc.Inventors: Yimin Chen, Shan Lu, Chuang Zhang, Junmou Zhang, Yuanlin Cheng, Jian Wang
-
Publication number: 20240045749Abstract: A method, system and device for analyzing an error rate of an MLC chip. The method includes selecting data blocks from the MLC chip, and performing erasing-writing operations to the data blocks; after the erasing-writing operations are completed, reading each of groups of the dual-bits corresponding to each of the first pages and the second pages of the data blocks, and determining the bit state of the each of groups of the dual-bits; counting up the first total quantity of all of the dual-bits corresponding to the target page in the target bit state representing that the data writing is erroneous, to obtain a first error rate of the target page in the target bit state; and counting up a second total quantity of all of the dual-bits corresponding to the data blocks in the target bit state.Type: ApplicationFiled: December 30, 2021Publication date: February 8, 2024Inventors: Min WANG, Chuang ZHANG, Zhixin REN
-
Publication number: 20240045860Abstract: Provided is a data query method, applied to a heterogeneous acceleration platform. The data query method includes: determining operators in a database management system, and accomplishing, in a parallel processor, functions corresponding to the operators (S101); if an SQL query statement is received, converting, by using a CPU, the where clause in the SQL query statement into a data structure including a binary tree and a linked list (S102); controlling the CPU to generate an operation code stream of the data structure according to node information (S103); and performing, by using the parallel processor, a screening operation corresponding to the operation code stream on records in the database management system to obtain a query result conforming to the where clause (S104).Type: ApplicationFiled: April 28, 2022Publication date: February 8, 2024Inventors: Ke LIU, Chuang ZHANG, Jie SUN, Zhixin REN, Zhongxiang SUN
-
Patent number: 11893011Abstract: Provided is a data query method, applied to a heterogeneous acceleration platform. The data query method includes: determining operators in a database management system, and accomplishing, in a parallel processor, functions corresponding to the operators (S101); if an SQL query statement is received, converting, by using a CPU, the where clause in the SQL query statement into a data structure including a binary tree and a linked list (S102); controlling the CPU to generate an operation code stream of the data structure according to node information (S103); and performing, by using the parallel processor, a screening operation corresponding to the operation code stream on records in the database management system to obtain a query result conforming to the where clause (S104).Type: GrantFiled: April 28, 2022Date of Patent: February 6, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Ke Liu, Chuang Zhang, Jie Sun, Zhixin Ren, Zhongxiang Sun
-
Publication number: 20230376226Abstract: Provided are a storage block management information synchronous recording method and system, and a terminal and a storage medium. The method comprises: screening, from all good blocks, two blocks having the greatest difference, and taking the two blocks as a master block and a slave block; setting the number of synchronous recording interval pages of the master block and the slave block; and synchronously writing management information to the master block and the slave block according to the number of interval pages. According to the present application, by using an information recording method of a master-slave block interval alternating method, two block intervals are used and various abnormal situations are handled synchronously, such that where data of one part is lost, a copy can be obtained from the other party, thereby ensuring that an NAND operation system does not break down due to the frequent occurrence of information errors.Type: ApplicationFiled: November 29, 2021Publication date: November 23, 2023Inventors: Min WANG, Chuang ZHANG, Zhixin REN
-
Publication number: 20230379510Abstract: In an embodiment a method for sharing a camera includes separately performing, by an electronic device, in response to an image obtaining request sent by a first application and an image obtaining request sent by a second application, the following operations: creating a first image consumer instance corresponding to the first application and creating a second image consumer instance corresponding to the second application, obtaining a corresponding first image provider instance based on the first camera and the first image parameter set that are requested by the image obtaining requests sent by the first application and the second application and establishing an association between the first image consumer instance and the first image provider instance and an association between the second image consumer instance and the first image provider instance.Type: ApplicationFiled: August 24, 2021Publication date: November 23, 2023Inventor: Chuang Zhang
-
Patent number: 11736213Abstract: A transmission method of a physical signal, a terminal, and a base station are provided. The transmission method may include receiving first configuration information, determining a measurement time-frequency resource for a residual self-interference measurement based on the first configuration information, performing the residual self-interference measurement on the measurement time-frequency resource to obtain a measurement result, transmitting feedback information determined according to the measurement result, receiving second configuration information determined according to the feedback information and determining a duplex mode of a terminal based on the second configuration information. According to the present disclosure, interference during a signal transmission procedure may be reduced.Type: GrantFiled: April 22, 2020Date of Patent: August 22, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Di Su, Chen Qian, Peng Lin, Chuang Zhang, Bin Yu
-
Patent number: 11703432Abstract: An in-situ test device and method for surrounding rock strength of bolt supported roadway is provided. The test device includes a fixing mechanism, a loading mechanism, a measuring mechanism and a control system. The loading mechanism includes a hydraulic pump and a plunger pump, the hydraulic pump drives the plunger pump to work and controls the lifting speed of the loading cylinder; the measuring mechanism includes an infrared ranging unit and a wireless pressure monitoring unit; the control system controls the work of the loading mechanism and processes the monitoring data. The test device is directly installed in the roadway and fixed with the bolt. The device is loaded after leveling, the device is disassembled after the monitoring data are obtained, and the in-situ test for the surrounding rock strength of the bolt supported roadway is completed. The steps are simple and adaptable.Type: GrantFiled: July 25, 2022Date of Patent: July 18, 2023Assignee: SHANDONG UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Fenghai Yu, Xuerui Yang, Yunliang Tan, Qiang Ren, Kai Zhou, Chuang Zhang, Pan Du, Qingduo Wang
-
Patent number: 11695507Abstract: A multiple access method, a multiple access transmitter, and a multiple access receiver includes performing, by a transmitter, channel coding on a bit sequence to determine a coded sequence. The method also includes interleaving and/or scrambling the coded sequence, and performing multidimensional constellation modulation on the interleaved and/or scrambled sequence; performing grid mapping on the modulated symbol sequence to determine a mapped sequence, and transmitting the mapped sequence. The method also includes receiving, by a receiver, mixed signals from multiple transmitters, the mixed signals are obtained by performing, by each of the multiple transmitters, interleaving and/or scrambling, multidimensional constellation modulation and grid mapping on data.Type: GrantFiled: March 26, 2018Date of Patent: July 4, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Chuang Zhang, Qi Xiong, Chen Qian, Bin Yu, Chengjun Sun
-
Publication number: 20230124786Abstract: The present disclosure provides a method and an apparatus for self-interference cancellation, a terminal and a base station are disclosed. The method includes truncating a signal based on a detection window, where the signal comprises a receive signal and a self-interference signal which is associated with a transmit signal, and a length of the detection window is less than a symbol length, performing self-interference channel estimation to obtain an estimation of a self-interference channel, based on the truncated signal and a first reference signal which is carried by the transmit signal and used for self-interference channel estimation, where the first reference signal has a comb structure in frequency domain, and performing self-interference cancellation based on the transmit signal and the estimation of the self-interference channel. The method can reduce the influence on the accuracy of self-interference channel estimation due to inter-symbol interference caused by timing misalignment.Type: ApplicationFiled: February 25, 2021Publication date: April 20, 2023Inventors: Chen QIAN, Di SU, Peng LIN, Chuang ZHANG
-
Publication number: 20230102171Abstract: For supporting higher data rates, resource configuration includes: acquiring, by a terminal, a configuration of physical resources; and performing, by the terminal, transmission according to the configured physical resources, wherein performing, by the terminal, transmission according to the configured physical resources comprises one of: neither performing, by the terminal, uplink transmission nor performing downlink reception on the configured physical resources; performing, by the terminal, only downlink reception on the configured physical resources; and performing, by the terminal, only uplink transmission on the configured physical resources.Type: ApplicationFiled: December 5, 2022Publication date: March 30, 2023Inventors: Di SU, Chuang ZHANG, Yingjie ZHANG, Peng LIN, Chen QIAN, Bin YU
-
Patent number: 11591858Abstract: A drill bit for cutting formation comprises a bit body, a plurality of cutters, a plurality of blades with pockets to accommodate the cutters respectively. Each of the plurality of cutters has an ultra-hard layer, two side facets extending obliquely inward from the substrate to a top surface of the ultra-hard layer, a convex portion between the two side facets. The convex portion comprises a transition surface and the transitional surface is convex as it extends between adjacent the two side facets. The curvature of the transitional surface varies along the cutter axis with the curvature at the cutting edge larger than the curvature of the cutter circumferential surface.Type: GrantFiled: December 11, 2020Date of Patent: February 28, 2023Assignees: CNPC USA CORPORATION, BEIJING HUAMEI, INC., CHINA NATIONAL PETROLEUM CORPORATIONInventors: Jiaqing Yu, Chris X. Cheng, Jianhua Guo, Bo Zhou, Shijun Qiao, Chuang Zhang, Xu Wang, Chi Ma, Xiongwen Yang