Patents by Inventor Chun-An Cheng

Chun-An Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240168057
    Abstract: A probe card for high-frequency testing is provided. The probe card includes a substrate, a flexible substrate, a probe, and at least one movable conductive pillar. The substrate has a first surface, a second surface, and at least one first through hole. The flexible substrate is disposed on the second surface of the substrate and has at least one second through hole. The second through hole and the first through hole correspond to each other. The probe is disposed on the second surface of the substrate, and is electrically connected to the flexible substrate. The movable conductive pillar movably passes through the first through hole and the second through hole.
    Type: Application
    Filed: April 10, 2023
    Publication date: May 23, 2024
    Inventors: HUNG-CHUN HUANG, WEN-HAO CHENG, YUAN-TING TAI
  • Publication number: 20240166711
    Abstract: The present application provides a method for promoting the sternness and/or transdifferentiation of acinar cells, comprising the following steps: providing an acinar cell, transfecting a plasmid into the acinar cell, and culturing the transfected acinar cell, wherein the plasmid contains a genetic material for overexpression of N-acetylglucosaminyltransferase V (GnT-V).
    Type: Application
    Filed: November 18, 2022
    Publication date: May 23, 2024
    Inventors: Pei-Jen Lou, Tai-Horng Young, Ching-Chia Cheng, Mei-Chun Lin, Hisn-Lin Chen
  • Publication number: 20240170537
    Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. In addition, the nanostructures includes channel regions and source/drain regions. The semiconductor structure further includes a gate structure vertically sandwiched the channel regions of the nanostructures and a contact wrapping around and vertically sandwiched between the source/drain regions of the nanostructures.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun LIN, Kuo-Hua PAN, Jhon-Jhy LIAW, Chao-Ching CHENG, Hung-Li CHIANG, Shih-Syuan HUANG, Tzu-Chiang CHEN, I-Sheng CHEN, Sai-Hooi YEONG
  • Publication number: 20240171663
    Abstract: A foldable electronic device is provided and includes a central base, a torque module, two wing members, two transmission members, two panel bodies, a synchronous module and a flexible screen. The torque module is disposed on the central base, the wing members pivot relative to the central base, the transmission members are pivotally connected to the torque module and the central base, the panel bodies pivot relative to the wing members and linearly slide relative to the transmission members, the synchronous module drives the transmission members to reverse synchronously, and the flexible screen is arranged on the panel bodies and the wing members and includes a bendable area. The flexible screen is flattened when the panel bodies are in an unfolded state, and the bendable area bends when the panel bodies are in a folded state.
    Type: Application
    Filed: May 9, 2023
    Publication date: May 23, 2024
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Ching-Hui YEN, Chien-Cheng YEH, Chun-Hao HUANG
  • Patent number: 11990488
    Abstract: A grid structure in a pixel array may be at least partially angled or tapered toward a top surface of the grid structure such that the width of the grid structure approaches a near-zero width near the top surface of the grid structure. This permits the spacing between color filter regions in between the grid structure to approach a near-zero spacing near the top surfaces of the color filter regions. The tight spacing of color filter regions provided by the angled or tapered grid structure provides a greater surface area and volume for incident light collection in the color filter regions. Moreover, the width of the grid structure may increase at least partially toward a bottom surface of the grid structure such that the wider dimension of the grid structure near the bottom surface of the grid structure provides optical crosstalk protection for the pixel sensors in the pixel array.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Lin Chen, Ching-Chung Su, Chun-Hao Chou, Kuo-Cheng Lee
  • Patent number: 11987676
    Abstract: A black polyester film and a method for manufacturing the same are provided. The black polyester film includes a physically recycled polyester resin and a chemically recycled polyester resin. The physically recycled polyester resin is formed by a plurality of physically recycled polyester chips. The chemically recycled polyester resin is formed by a plurality of chemically recycled polyester chips and mixed with the physically recycled polyester resin. The plurality of chemically recycled polyester chips further include chemically recycled electrostatic pinning polyester chips. The chemically recycled electrostatic pinning polyester chips contain electrostatic pinning additives, and the electrostatic pinning additives are metal salts. Expressed in percent by weight based on a total weight of the polyester film, a content of the electrostatic pinning additives in the polyester film is between 0.005% and 0.1% by weight. The black polyester film further includes a black additive.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: May 21, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Chun-Cheng Yang, Chia-Yen Hsiao, Ching-Yao Yuan
  • Publication number: 20240156092
    Abstract: The invention relates to a composition for promoting the growth of legumes. The composition includes auxin, choline chloride and ?-aminobutyric acid (GABA). The invention also relates to a method for promoting the growth of legumes.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 16, 2024
    Inventors: Ting-Wen CHENG, Cho-Chun HUANG, Gui-Jun Li, Kai XIA, Chen-Pang WU
  • Publication number: 20240156405
    Abstract: A smart wearable device has a signal calibration function executed by a signal calibration method and applied to a finger, a limb and/or a neck of a user. The smart wearable device includes at least one physiological signal detector, at least one pressure detector and an operation processor. The at least one physiological signal detector is adapted to abut against a detection area of the user for detecting a physiological signal. The at least one pressure detector is disposed around the at least one physiological signal detector and adapted to detect a pressure value of the detection area. The operation processor is electrically connected with the at least one physiological signal detector and the at least one pressure detector. The operation processor is adapted to optimize the physiological signal when the pressure value exceeds a predefined pressure threshold.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 16, 2024
    Applicant: PixArt Imaging Inc.
    Inventors: Yung-Chang Lin, Jian-Cheng Liao, Chun-Chih Chen, Sen-Huang Huang, Yen-Min Chang
  • Publication number: 20240163751
    Abstract: A method performed by a UE connected to a first cell associated with a first satellite is provided. The method receives a measurement configuration includes a first SMTC and a second SMTC. The first and second SMTCs have at least a first parameter that is common to both first and second SMTCs and a second parameter that is different in each SMTC. The method receives a signal to perform a measurement procedure for a second cell associated with a second satellite. The method performs the measurement procedure based on the received measurement configuration, where the first parameter includes a duration of time that indicates an SMTC window within which at least one of an SSB or a CSI-RS is detectable by the UE to perform the measurement procedure, and the second parameter includes an offset value.
    Type: Application
    Filed: December 21, 2023
    Publication date: May 16, 2024
    Inventors: CHIEN-CHUN CHENG, YUNG-LAN TSENG, HSIN-HSI TSAI, HAI-HAN WANG
  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11984363
    Abstract: A semiconductor device includes a semiconductor substrate, a first epitaxial feature having a first semiconductor material over the semiconductor substrate, and a second epitaxial feature having a second semiconductor material over the semiconductor substrate. The second semiconductor material being different from the first semiconductor material. The semiconductor device further includes a first silicide layer on the first epitaxial feature, a second silicide layer on the second epitaxial feature, a metal layer on the first silicide layer, a first contact feature over the metal layer, and a second contact feature over the second silicide layer. A first number of layers between the first contact feature and the first epitaxial feature is greater than a second number of layers between the second contact feature and the second epitaxial feature.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Cheng Chen, Chun-Hsiung Lin, Chih-Hao Wang
  • Patent number: 11984485
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
  • Patent number: 11985324
    Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Yu-Cheng Lin, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11985662
    Abstract: A user equipment (UE) includes one or more non-transitory computer-readable media containing computer-executable instructions embodied therein, and at least one processor coupled to the one or more non-transitory computer-readable media. The at least one processor configured to execute the computer-executable instructions to receive downlink control information (DCI) on a downlink (DL) channel of a non-terrestrial network (NTN), the DL channel reception ending in a first slot, and transmit an uplink (UL) transmission on a UL channel of the NTN in a second slot. The second slot is separate from the first slot by a timing offset, where a duration of the timing offset is dependent on a type of the UL transmission and a numerology of the UL transmission.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 14, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Chien-Chun Cheng, Chia-Hao Yu, Hung-Chen Chen, Chie-Ming Chou
  • Publication number: 20240154447
    Abstract: A power system including a first battery pack, a second battery pack, and a power management circuit is disclosed. The first battery pack has a first end and a second end, and has a first battery capacity. The second battery pack has a third end and a fourth end. The third end is coupled to the second end of the first battery pack and provides a low battery voltage. The fourth end is grounded, the second battery pack has a second battery capacity, and the second battery capacity is greater than the first battery capacity. The power management circuit is coupled to the second battery pack to receive the low battery voltage, and provides a component operating voltage to an electronic components based on the low battery voltage.
    Type: Application
    Filed: August 29, 2023
    Publication date: May 9, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Yi-Hsuan Lee, Liang-Cheng Kuo, Chun-Wei Ko, Ya Ju Cheng, Chih Wei Huang, Ywh Woei Yeh, Yu Cheng Lin, Yen Ting Wang
  • Publication number: 20240153558
    Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Der Chih, Chung-Cheng Chou, Chun-Yun Wu, Chen-Ming Hung
  • Publication number: 20240152880
    Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.
    Type: Application
    Filed: February 13, 2023
    Publication date: May 9, 2024
    Applicant: OBOOK INC.
    Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chun-Jen Chen, Po-Hua Lin, Wei-Te Lin, Pei-Hsuan Weng, Mei-Su Wang, I-Cheng Lin, Cheng-Wei Chen
  • Publication number: 20240155491
    Abstract: Various solutions for low-power wake-up signal (LP-WUS) monitoring with respect to user equipment and network node in mobile communications are described. An apparatus may receive a configuration from a network node. The apparatus may comprise a main radio (MR) and a lower-power wake-up radio (LP-WUR). The apparatus may determine whether to activate or deactivate a low-power wake-up signal (LP-WUS) monitoring by the LP-WUR according to at least one pre-configured condition in the configuration. The apparatus may receive an LP-WUS from the network node via the LP-WUR in an event that the LP-WUS monitoring is activated.
    Type: Application
    Filed: October 12, 2023
    Publication date: May 9, 2024
    Inventors: Chien-Chun Cheng, Wei-De Wu, Yi-Ju Liao, Yi-Chia Lo, Cheng-Hsun Li
  • Patent number: 11978720
    Abstract: A method includes attaching a die to a thermal compression bonding (TCB) head through vacuum suction, wherein the die comprises a plurality of conductive pillars, attaching a first substrate to a chuck through vacuum suction, wherein the first substrate comprises a plurality of solder bumps, contacting a first conductive pillar of the plurality of conductive pillars to a first solder bump of the plurality of solder bumps, wherein contacting the first conductive pillar to the first solder bump results in a first height between a topmost surface of the first conductive pillar and a bottommost surface of the first solder bump, and adhering the first solder bump to the first conductive pillar to form a first joint, wherein adhering the first solder bump to the first conductive pillar comprises heating the TCB head.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kai Jun Zhan, Chin-Fu Kao, Kuang-Chun Lee, Ming-Da Cheng, Chen-Shien Chen