Abstract: A quantum dot oil-based ink is provided. The quantum dot oil-based ink includes a quantum dot material, a dispersing solvent, a viscosity modifier, and a surface tension modifying solution. The dispersing solvent includes a linear alkane having 6 to 14 carbon atoms. The viscosity modifier includes an aromatic hydrocarbon having 10 to 18 carbon atoms or a linear olefin having 16 to 20 carbon atoms. The surface tension modifying solution includes a hydrophobic polymer material and a nonpolar solvent.

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract: A semiconductor substrate includes an insulating layer and a conductive circuit layer embedded at a surface of the insulating layer. The conductive circuit layer includes a first portion and a second portion. The first portion includes a bonding pad and one portion of a conductive trace, and the second portion includes another portion of the conductive trace. An upper surface of the first portion is not coplanar with an upper surface of the second portion. A semiconductor packaging structure includes the semiconductor substrate.

Abstract: A polymer of fluorine-containing sulfonated poly(arylene ether)s and a manufacturing method thereof are provided. The polymer is formed by processing a nucleophilic polycondensation between a fluorine-containing monomer having an electron-withdrawing group and a multi-phenyl monomer. A main structure of the polymer of fluorine-containing sulfonated poly(arylene ether)s has a first portion with fluoro or trifluoromethyl substituted phenyl groups, and a second portion with sulfonated phenyl groups.

Abstract: A polymer of fluorine-containing sulfonated poly(arylene ether)s and a manufacturing method thereof are provided. The polymer is formed by processing a nucleophilic polycondensation between a fluorine-containing monomer having an eletron-withdrawing group and a multi-phenyl monomer. A main structure of the polymer of fluorine-containing sulfonated poly(arylene ether)s has a first portion with fluoro or trifluoromethyl substituted phenyl groups, and a second portion with sulfonated phenyl groups.

Abstract: A polymer of fluorine-containing sulfonated poly(arylene ether)s and a manufacturing method thereof are provided. The polymer is formed by processing a nucleophilic polycondensation between a fluorine-containing monomer having an electron-withdrawing group and a multi-phenyl monomer. A main structure of the polymer of fluorine-containing sulfonated poly(arylene ether)s has a first portion with fluoro or trifluoromethyl substituted phenyl groups, and a second portion with sulfonated phenyl groups.

Abstract: A polymer of fluorine-containing sulfonated poly(arylene ether)s and a manufacturing method thereof are provided. The polymer is formed by processing a nucleophilic polycondensation between a fluorine-containing monomer having an electron-withdrawing group and a multi-phenyl monomer. A main structure of the polymer of fluorine-containing sulfonated poly(arylene ether)s has a first portion with fluoro or trifluoromethyl substituted phenyl groups, and a second portion with sulfonated phenyl groups.

Abstract: A semiconductor package substrate includes a core portion, an upper circuit layer and a plurality of pillars. The pillars are disposed on and project upward from the upper circuit layer. Top surfaces of the pillars are substantially coplanar. The pillars provide an electrical interconnect to a semiconductor die. Solder joint reliability as between the substrate and the semiconductor die is improved.

Abstract: A semiconductor substrate includes an insulating layer and a conductive circuit layer embedded at a surface of the insulating layer. The conductive circuit layer includes a first portion and a second portion. The first portion includes a bonding pad and one portion of a conductive trace, and the second portion includes another portion of the conductive trace. An upper surface of the first portion is not coplanar with an upper surface of the second portion. A semiconductor packaging structure includes the semiconductor substrate.

Abstract: An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between the upper patterned conductive layer and the electronic component, a first electrical interconnect, a lower patterned conductive layer, a conductive via, and a second electrical interconnect. The dielectric layer has a first opening exposing the electrical contact, and a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer. The first electrical interconnect extends from the electrical contact to the upper patterned conductive layer, and fills the first opening. The second opening has an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer. The conductive via is located at the lower portion of the second opening. The second electrical interconnect fills the upper portion of the second opening.

Abstract: A semiconductor package substrate includes a core portion, an upper circuit layer and a plurality of pillars. The pillars are disposed on and project upward from the upper circuit layer. Top surfaces of the pillars are substantially coplanar. The pillars provide an electrical interconnect to a semiconductor die. Solder joint reliability as between the substrate and the semiconductor die is improved.

Abstract: A semiconductor package substrate includes a core portion, an upper circuit layer and a plurality of pillars. The pillars are disposed on and project upward from the upper circuit layer. Top surfaces of the pillars are substantially coplanar. The pillars provide an electrical interconnect to a semiconductor die. Solder joint reliability as between the substrate and the semiconductor die is improved.

Abstract: A polymer of sulfonated poly(arylene ether)s (PAEs) and a manufacturing method thereof are provided. A main structure of the PAEs has a first side formed by multi-phenyl glycol monomer and a second side formed by multi-phenyl dihalo monomer with an electron-withdrawing group. The glycol monomer and the dihalo monomer are reacted with each other by a nucleophilic displacement reaction, so as to form the main structure of the PAEs. A film made of the PAEs has a better size stability under a high water uptake.

Abstract: The present disclosure relates to a semiconductor substrate and a method for making the same. The semiconductor substrate includes an insulation layer, a first circuit layer, a second circuit layer, a plurality of conductive vias and a plurality of bumps. The first circuit layer is embedded in a first surface of the insulation layer, and exposed from the first surface of the insulation layer. The second circuit layer is located on a second surface of the insulation layer and electrically connected to the first circuit layer through the conductive vias. The bumps are directly located on part of the first circuit layer, where the lattice of the bumps is the same as that of the first circuit layer.

Abstract: A polymer of suifonated poly(arylene ether)s (PAEs) and a manufacturing method thereof are provided. A main structure of the PAEs has a first side formed by multi-phenyl glycol monomer and a second side formed by multi-phenyl dihalo monomer with an electron-withdrawing group. The glycol monomer and the dihalo monomer are reacted with each other by a nucleophilic displacement reaction, so as to form the main structure of the PAEs. A film made of the PAEs has a better size stability under a high water uptake.

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract: A polymer of sulfonated poly(arylene ether)s (PAEs) and a manufacturing method thereof are provided. A main structure of the PAEs has a first side formed by multi-phenyl glycol monomer and a second side formed by multi-phenyl dihalo monomer with an electron-withdrawing group. The glycol monomer and the dihalo monomer are reacted with each other by a nucleophilic displacement reaction, so as to form the main structure of the PAEs. A film made of the PAEs has a better size stability under a high water uptake.