Patents by Inventor Chun-Chia Chen

Chun-Chia Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207669
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Application
    Filed: March 7, 2023
    Publication date: June 29, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Publication number: 20230199171
    Abstract: Various schemes for managing search memory are described, which are beneficial in achieving enhanced coding gain, low latency, and/or reduced hardware for a video encoder or decoder. In processing a current block of a current picture, an apparatus determines a quantity of a plurality of reference pictures of the current picture. The apparatus subsequently determines, for at least one of the reference pictures, a corresponding search range size based on the quantity. The apparatus then determines, based on the search range size and a location of the current block, a search range of the reference picture, based on which the apparatus encodes or decodes the current block.
    Type: Application
    Filed: November 28, 2022
    Publication date: June 22, 2023
    Inventors: Yu-Ling Hsiao, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230199170
    Abstract: A video coding system generating candidates for Merge Mode with Motion Vector Difference (MMVD) with reduced resource usage is provided. The system receives data to be encoded or decoded as a current block of a current picture of a video. The system identifies multiple MMVD candidates for different offset positions based on a merge candidate of the current block. The system generates reference samples for the identified MMVD candidates. The system reconstructs the current block or encodes the current block into a bitstream by using the generated reference samples. The system processes the MMVD candidates in separate groups: a first group of vertical MMVD candidates and a second group of horizontal MMVD candidates. The system generates the reference samples for the identified MMVD candidates by applying a vertical filter to source reference samples of horizontal MMVD candidates and then applying a horizontal filter to outputs of the vertical filter.
    Type: Application
    Filed: October 31, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230199196
    Abstract: Video encoding methods and apparatuses for frequency domain mode decision include receiving residual data of a current block, testing multiple coding modes on the residual data, calculating a distortion associated with each of the coding modes in a frequency domain, performing a mode decision to select a best coding mode from the tested coding modes according to the distortion calculated in the frequency domain, and encoding the current block based on the best coding mode.
    Type: Application
    Filed: March 23, 2022
    Publication date: June 22, 2023
    Inventors: Chen-Yen LAI, Ching-Yeh CHEN, Tzu-Der CHUANG, Chih-Wei HSU, Chun-Chia CHEN, Yu-Wen HUANG
  • Publication number: 20230199199
    Abstract: Various schemes pertaining to video coding parallelization techniques are described. An apparatus receives video data. The apparatus subsequently calculates a plurality of figures of merits (FOMs), each of the FOM representing how well a particular coding tool may perform in encoding the video data. The apparatus further determines a coding tool that may be suitable for encoding the video data by comparing the FOMs. In determining the coding tool, the apparatus utilizes time-interleaving techniques to parallelly process the video data. The video data may include an array of coding blocks, and the apparatus may receive the video data using a snake-like processing order scanning through the array of coding blocks.
    Type: Application
    Filed: November 1, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230199217
    Abstract: A video encoder receives raw pixel data to be encoded as a current block of a current picture of a video into a bitstream. The video encoder identifies multiple candidate bi-prediction positions for the current block, including a center position, a first set of offset positions, and a second set of offset positions. The first set of offset positions and the second set of offset positions interleave each other. The encoder computes distortion values for each of the candidate bi-prediction positions based on several possible weighting parameter values. The distortion values for the center position are based on each of the several possible weighting parameter values. The distortion values for the first set of offset positions are based on a first subset of the possible weighting parameter values. The distortion values for the second set of offset positions are based on a second subset of the possible weighting parameter values.
    Type: Application
    Filed: November 22, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Yu-Ling Hsiao, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230171403
    Abstract: Video encoding methods and apparatuses include collecting statistics data, determining a matrix and vector representing a set of linear equations, solving the matrix and vector by a novel Gaussian elimination method to derive optimal parameter adjustments for an affine mode or adaptive loop filter coefficients, and encoding the current block by the affine mode or encoding one or more blocks by applying ALF filtering. Embodiments of the novel Gaussian elimination method reduce the critical path of entry operations in each row elimination step from one reciprocal, two multiplication, and one addition operations to one reciprocal, one multiplication, and one addition operations, or one multiplication and one addition operations.
    Type: Application
    Filed: March 23, 2022
    Publication date: June 1, 2023
    Inventors: Shih-Chun CHIU, Tzu-Der CHUANG, Ching-Yeh CHEN, Chun-Chia CHEN, Chih-Wei HSU, Yu-Wen HUANG
  • Publication number: 20230156234
    Abstract: Video encoding methods and apparatuses include receiving reconstructed video samples, determining an initial clipping setting for ALF coefficients, deriving clipping setting candidates from the initial clipping setting. ALF coefficients for the initial clipping setting and the clipping setting candidates are derived by solving inverse matrices, where partial intermediate results of solving ALF coefficients are shared by two or more clipping settings. A distortion value corresponds to the derived ALF coefficients for each clipping setting is computed, and final clipping indices for final ALF coefficients are determined according to the distortion values. ALF filtering is applied to the reconstructed video samples based on the final ALF coefficients and the final clipping indices.
    Type: Application
    Filed: April 22, 2022
    Publication date: May 18, 2023
    Inventors: Shih-Chun CHIU, Chih-Wei HSU, Ching-Yeh CHEN, Chun-Chia CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Publication number: 20230156181
    Abstract: A video coding method and apparatus include receiving input data associated with a current block, determining a coding mode for the current block by disabling Geometric Partitioning Mode (GPM) when a size of the current block is greater than or equal to a threshold size, and encoding or decoding the current block according to the determined coding mode. In a high-throughput video encoder performing Rate Distortion Optimization (RDO) by parallel Processing Elements (PEs), all or partial PEs receive search range reference samples in a broadcasting form. The parallel PEs test multiple coding modes on various partitioning for the current block, decide a block partitioning structure for dividing the current block into one or more coding blocks, and decide a coding mode for each of the coding blocks.
    Type: Application
    Filed: March 3, 2022
    Publication date: May 18, 2023
    Inventors: Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Publication number: 20230119972
    Abstract: Video encoding methods and apparatuses for performing rate-distortion optimization by a hierarchical architecture include receiving input data associated with a current block in a current picture, determining a block partitioning structure to split the current block into coding blocks and determining a corresponding coding mode for each coding block by multiple Processing Element (PE) groups, and entropy encoding the coding blocks in the current block according to the coding modes determined by the PE groups. Each PE group has parallel PEs and is associated with a particular block size. The parallel PEs in each PE group test a number of coding modes on each partition or sub-partition of the current block to derive rate-distortion costs. The block partitioning structure and corresponding coding modes are then decided based on the rate-distortion costs derived by the PE groups.
    Type: Application
    Filed: January 18, 2022
    Publication date: April 20, 2023
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Patent number: 11632110
    Abstract: A high-speed circuit with a high-voltage (HV) driver circuit. The high-speed circuit has a driver circuit and a level shifter. The driver circuit includes HV components which are operated in an HV domain. The level shifter includes low-voltage (LV) components which are operated in an LV domain. The level shifter translates signals from the LV domain to the HV domain to generate control signals for the driver circuit. The high-speed circuit may include a protection voltage generator converting a power supply voltage and a power ground voltage to generate a first direct-current bias voltage (VBP) and a second direct-current bias voltage (VBN) to bias the LV components of the level shifter. The LV components of the level shifter include input transistors and protection transistors. Gate voltages of the protection transistors may be tied to VBP or VBN.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 18, 2023
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Yao-Tsung Hsieh, Jian-Feng Shiu, Chao-An Chen
  • Patent number: 11631753
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: April 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Publication number: 20230065083
    Abstract: Low-latency video coding methods and apparatuses include receiving input data associated with a current Intra slice composed of Coding Tree Units (CTU), where each CTU includes luma and chroma Coding Tree Blocks (CTBs), partitioning each CTB into non-overlapping pipeline units, and encoding or decoding the CTUs in the current Intra slices by performing processing of chroma pipeline units after beginning processing of luma pipeline units in at least one pipeline stage. Each of the pipeline units is processed by one pipeline stage after another pipeline stage, and different pipeline stages process different pipeline units simultaneously. The pipeline stage in the low-latency video coding methods and apparatuses simultaneously processes one luma pipeline unit and at least one previous chroma pipeline unit within one pipeline unit time interval.
    Type: Application
    Filed: December 16, 2021
    Publication date: March 2, 2023
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Patent number: 11589049
    Abstract: A method and apparatus of video coding operate by receiving input data associated with a current data unit in a current picture, wherein the current data unit includes a luma component and a chroma component and the current data unit includes a luma data unit and a chroma data unit. The operation proceeds by splitting the luma data unit and the Chroma data unit using one shared tree until the luma data unit and the chroma data unit reach a stop node, encoding or decoding the stop node as a leaf CU (coding unit) if the stop node is greater than M×N for the luma component, M and N are positive integers, and signalling or parsing a prediction mode for the stop node if the stop node is smaller than or equal to M×N for the luma component.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: February 21, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Kung-Nien Yang, Chun-Chia Chen
  • Publication number: 20230047501
    Abstract: For each prediction candidate of a set of one or more prediction candidates of the current block, a video coder computes a matching cost between a set of reference pixels of the prediction candidate in a reference picture and a set of neighboring pixels of a current block in a current picture. The video coder identifies a subset of the reference pictures as major reference pictures based on a distribution of the prediction candidates among the reference pictures of the current picture. A bounding block is defined for each major reference picture, the bounding block encompassing at least portions of multiple sets of reference pixels for multiple prediction candidates. The video coder assigns an index to each prediction candidate based on the computed matching cost of the set of prediction candidates. A selection of a prediction candidate is signaled by using the assigned index of the selected prediction candidate.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 16, 2023
    Inventors: Chih-Yao Chiu, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11575905
    Abstract: A method and apparatus for video coding are disclosed. According to this method, a current block is received at an encoder side or compressed data comprising the current block is received at a decoder side, where the current block is partitioned into two geometric prediction units. Motion information for the two geometric prediction units is determined. Weighting information for the two geometric prediction units is determined. A motion storage type variable based on the weighting information is determined, where the motion information associated with the current block is stored according to a value of the motion storage type variable. A geometric predictor for the current block is generated by blending two geometric predictors according to the weighting information, where the two geometric predictors are derived for the two geometric prediction units using the motion information associated with the current block.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: February 7, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Yu-Ling Hsiao, Chun-Chia Chen, Chih-Wei Hsu
  • Publication number: 20230007281
    Abstract: Video processing methods and apparatuses for processing a current block in a current picture by reference picture resampling include receiving input data of the current block, determining a scaling window of the current picture and a scaling window of a reference picture. The current picture and reference picture may have different scaling window sizes. A ratio between a scaling window width, height, or size of the current picture and a scaling window width, height, or size of the reference picture is constrained to be within a ratio constraint. A reference block is generated from the reference picture according to the ratio, and used to encode or decode the current block.
    Type: Application
    Filed: December 10, 2020
    Publication date: January 5, 2023
    Inventors: Tzu-Der CHUANG, Chih-Wei HSU, Ching-Yeh CHEN, Chia-Ming TSAI, Chun-Chia CHEN, Olena CHUBACH, Lulin CHEN, Yu-Wen HUANG
  • Patent number: 11546587
    Abstract: A method for signaling adaptive loop filter (ALF) settings is provided. A video decoder receives data from a bitstream for a block of pixels to be decoded as a current block of a current picture of a video. The video decoder parses whether to use adaptive parameter set (APS) for filtering the current block without determining whether to select a particular APS from a plurality of APSs. When the APS is used to filter the current block, the video decoder parses a first filter selection index for selecting a filter from a set of filters in the APS. When the APS is not used to filter the current block, the video decoder signals a second filter selection index for selecting a filter from a set of default fixed filters. The video decoder filters the current block based on the selected filter. The video decoder outputs the filtered current block.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: January 3, 2023
    Inventors: Yu-Ling Hsiao, Chun-Chia Chen, Ching-Yeh Chen, Tzu-Der Chuang, Chih-Wei Hsu
  • Patent number: 11546603
    Abstract: A video coder receives data from a bitstream for a block of pixels to be encoded or decoded as a current block of a current picture of a video. Upon determining that an applied block setting of the current block satisfies a threshold condition, the video coder generates a first prediction based on a first motion information for a first prediction unit of the current block. The video coder generates a second prediction based on a second motion information for a second prediction unit of the current block. The video coder generates a third prediction based on the first and second motion information for an overlap prediction region that is defined based on a partitioning between the first prediction unit and the second prediction unit. The video coder encodes or decodes the current block by using the first, second, and third predictions.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: January 3, 2023
    Inventors: Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu
  • Patent number: 11539939
    Abstract: Video processing methods and apparatuses for processing a current block in a current picture include receiving input data of the current block, determining a reference picture, determining whether picture sizes of the current and reference pictures are different, determining whether horizontal wraparound motion compensation is enabled for predicting the current block, performing motion compensation for the current block to obtain a reference block from the reference picture, and encoding or decoding the current block according to the reference block. Horizontal wraparound motion compensation is disabled when the picture sizes of the current and reference pictures are different.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: December 27, 2022
    Assignee: HFI Innovation Inc.
    Inventors: Chih-Yao Chiu, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Yu-Wen Huang, Tzu-Der Chuang