Patents by Inventor Chun Hok Ho

Chun Hok Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10540115
    Abstract: Memory systems may include a memory including a plurality of dies, and a controller suitable for receiving a host read request during programming of one of the plurality of dies; determining a suspendable die among the plurality of dies based on a suspension threshold; and suspending the determined suspendable die and performing the received request.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: January 21, 2020
    Assignee: SK hynix Inc.
    Inventors: Wei Zang, Chun Hok Ho
  • Patent number: 10114742
    Abstract: A first write data and a second write data destined for a first solid state storage channel and a second solid state storage channel, respectively, is received. The first write data is chopped using a chopping factor in order to obtain (1) a first piece of chopped write data destined for the first solid state storage channel and (2) a second piece of chopped write data destined for the first solid state storage channel. The second write data is chopped using the chopping factor in order to obtain (1) a third piece of chopped write data destined for the second solid state storage channel and (2) a fourth piece of chopped write data destined for the second solid state storage channel.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: October 30, 2018
    Assignee: SK Hynix Inc.
    Inventors: Wei-Hao Yuan, Chun Hok Ho, Johnson Yen
  • Patent number: 9934156
    Abstract: A host write is received which includes a write address and write data. It is determined if the write address is already stored in at least one of a plurality of open blocks. If so, a collision open block is determined at least the write data is stored in the collision open block. In the event it is determined that the write address is not already stored in at least one of the plurality of open blocks, a temperature for the host write is determined and at least the write data is stored in an open block associated with the temperature.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: April 3, 2018
    Assignee: SK Hynix Inc.
    Inventors: Fan Zhang, Chun Hok Ho, Yan Zhang
  • Patent number: 9710326
    Abstract: A first physical location is read to obtain read data. Error correction decoding is performed on the read data to obtain error-corrected data where the error-corrected data includes first error-corrected metadata. Error correction encoding is performed on a first random sequence combined with a second random sequence, concatenated with second metadata. Error correction encoding is also performed on a sequence of zeros concatenated with the first error-corrected metadata to obtain second encoded data. The error-corrected data, the first encoded data, and the second encoded data are summed to obtain migrated data, which is stored at a second physical location.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: July 18, 2017
    Assignee: SK Hynix Inc.
    Inventors: Fan Zhang, Chung-Li Wang, Chun Hok Ho
  • Publication number: 20160313946
    Abstract: Memory systems may include a memory including a plurality of dies, and a controller suitable for receiving a host read request during programming of one of the plurality of dies; determining a suspendable die among the plurality of dies based on a suspension threshold; and suspending the determined suspendable die and performing the received request.
    Type: Application
    Filed: April 21, 2016
    Publication date: October 27, 2016
    Inventors: Wei ZANG, Chun Hok HO
  • Publication number: 20160026526
    Abstract: A first physical location is read to obtain read data. Error correction decoding is performed on the read data to obtain error-corrected data where the error-corrected data includes first error-corrected metadata. Error correction encoding is performed on a first random sequence combined with a second random sequence, concatenated with second metadata. Error correction encoding is also performed on a sequence of zeros concatenated with the first error-corrected metadata to obtain second encoded data. The error-corrected data, the first encoded data, and the second encoded data are summed to obtain migrated data, which is stored at a second physical location.
    Type: Application
    Filed: May 26, 2015
    Publication date: January 28, 2016
    Inventors: Fan Zhang, Chung-Li Wang, Chun Hok Ho