Patents by Inventor Chun-Hong Peng

Chun-Hong Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955245
    Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 9, 2024
    Assignees: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
  • Patent number: 9525037
    Abstract: A trench gate metal oxide semiconductor field effect transistor includes a substrate and a gate. The substrate has a trench. The trench is extended downwardly from a surface of the substrate. The gate includes an insertion portion and a symmetrical protrusion portion. The insertion portion is embedded in the trench. The symmetrical protrusion portion is symmetrically protruded over the surface of the substrate.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: December 20, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Chun-Hong Peng, Yu-Hsi Lai
  • Publication number: 20150318366
    Abstract: A trench gate metal oxide semiconductor field effect transistor includes a substrate and a gate. The substrate has a trench. The trench is extended downwardly from a surface of the substrate. The gate includes an insertion portion and a symmetrical protrusion portion. The insertion portion is embedded in the trench. The symmetrical protrusion portion is symmetrically protruded over the surface of the substrate.
    Type: Application
    Filed: June 29, 2015
    Publication date: November 5, 2015
    Inventors: Chun-Hong Peng, Yu-Hsi Lai
  • Patent number: 9129876
    Abstract: An image sensor including a microlens, a substrate, a first dielectric layer, a second dielectric layer and a color filter is provided. The microlens receives light; the substrate includes a light sensing element in a light sensing area for receiving light incident to the microlens. The first dielectric layer and the second dielectric layer are stacked on the substrate from bottom to top, wherein the second dielectric layer has a recess on the first dielectric layer and in an optical path between the microlens and the light sensing element. The color filter is disposed in the recess. Moreover, the present invention also provides an image sensing process for forming said image sensor.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: September 8, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Chun-Hong Peng
  • Publication number: 20140353787
    Abstract: An image sensor including a microlens, a substrate, a first dielectric layer, a second dielectric layer and a color filter is provided. The microlens receives light; the substrate includes a light sensing element in a light sensing area for receiving light incident to the microlens. The first dielectric layer and the second dielectric layer are stacked on the substrate from bottom to top, wherein the second dielectric layer has a recess on the first dielectric layer and in an optical path between the microlens and the light sensing element. The color filter is disposed in the recess. Moreover, the present invention also provides an image sensing process for forming said image sensor.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 4, 2014
    Applicant: United Microelectronics Corp.
    Inventor: Chun-Hong Peng
  • Publication number: 20140110777
    Abstract: A trench gate metal oxide semiconductor field effect transistor includes a substrate and a gate. The substrate has a trench. The trench is extended downwardly from a surface of the substrate. The gate includes an insertion portion and a symmetrical protrusion portion. The insertion portion is embedded in the trench. The symmetrical protrusion portion is symmetrically protruded over the surface of the substrate.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hong PENG, Yu-Hsi LAI
  • Patent number: 6821892
    Abstract: A method is disclosed for accurately predicting the wet etch end points as a function of the temperature and concentration of the etching solution, as well as of the thickness of the film to be etched. This is accomplished by fitting an etch rate equation to the process of etching a film in terms of two constant parameters that are determined by one set of experiments performed on a given wet etch bench. Thereafter, the constants are used with the rate equation to calculate precisely the etch rate of a film, and then the etch rate is divided into a target film loss or a target film thickness to obtain etching time, or time to etch, which takes into account the variations in temperature and concentration, for example, of the acid in the solution. The resulting film either looses the specified amount of material, or acquires the specified thickness without incurring any damage, which is especially suited for sub-micron semiconductor technology where precise etching is required.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: November 23, 2004
    Assignee: Promos Technologies, Inc.
    Inventors: Chun Hong Peng, Rex Chen, Simon Chang
  • Patent number: 6211055
    Abstract: A method for making conductive plugs in a semiconductor wafer. In involves the steps of: (a) forming at least one through hole in a dielectric layer, which is formed above a conductive substrate; (b) subjecting the wafer to a NH4OH/H2O2 wet washing process and HCl/H2O2 wet washing process; (c) drying the wafer; (d) subjecting the wafer to a dilute hydrogen fluoride or buffered hydrogen fluoride wet washing process to remove the native oxide layer that maybe formed on the conductive substrate; (e) drying the wafer again; and (i) filling the at least one through hole with a conductive material to form at least one conductive channel. The wet washing station is modified such that the wet washing processes and the drying process are performed in the same station and without removing the wafer from the washing station during the wet washing and drying process.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: April 3, 2001
    Assignees: ProMOS Technology, Inc., Mosel Vitelic Inc., Siemens AG
    Inventors: Chun-Hong Peng, Weisheng Chao