Abstract: A method of manufacturing a hybrid random access memory in a system-on-chip, including steps of providing a semiconductor substrate with a magnetoresistive random access memory (MRAM) region and a resistive random-access memory (ReRAM) region, forming multiple ReRAM cells in the ReRAM region on the semiconductor substrate, forming a first dielectric layer on the semiconductor substrate, wherein the ReRAM cells are in the first dielectric layer, forming multiple MRAM cells in the MRAM region on the first dielectric layer, and forming a second dielectric layer on the first dielectric layer, wherein the MRAM cells are in the second dielectric layer.

Abstract: An electrical connector includes: an insulating body defining a mating space; and a terminal module assembled to the insulating body and having a circuit board and plural mating terminals mounted on the circuit board, wherein: each of the mating terminals has a contact portion extending obliquely backward, a bending portion bent backward from a front end of the contact portion, a connecting portion extending rearward from a rear end of the bending portion, and a mounting portion vertically extending from a rear end of the connecting portion for mounting on the circuit board; and a front end of the circuit board extends forward into the mating space.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a die structure including a plurality of die regions and a plurality of first seal rings. Each of the plurality of first seal rings surrounds a corresponding die region of the plurality of die regions. The semiconductor device further includes a second seal ring surrounding the plurality of first seal rings and a plurality of connectors bonded to the die structure. Each of the plurality of connectors has an elongated plan-view shape. A long axis of the elongated plan-view shape of each of the plurality of connectors is oriented toward a center of the die structure.

Abstract: A method for a clean procedure during manufacturing a semiconductor device, includes: providing a patterned sacrificial gate structure including a gate dielectric and a sacrificial layer; wherein the patterned sacrificial gate structure is embedded in a dielectric layer and an upper surface of the sacrificial layer is exposed; performing a first etching process to remove the sacrificial layer; and performing a hydrophilic treatment and a hydrophobic treatment to remove a residue of the sacrificial layer.

Abstract: An electronic device has a screw nut. The screw nut is configured for fixation of a fastener. The screw nut includes an inner nut component, a cushioning component, and an outer nut component. The inner nut component has a screw hole portion configured for fixation of the fastener. The cushioning component is sleeved on the inner nut component. The outer nut component is sleeved on the cushioning component. The cushioning component is connected between the inner nut component and the outer nut component so that the inner nut component is movably connected to the outer nut component.

Abstract: A fan module is adapted to be disposed on a mainboard. The fan module includes a base, a stator unit, a circuit board, a first restriction structure and a second restriction structure. The base includes a mounting shaft and a base opening, wherein the mounting shaft has an axis. The mounting shaft is telescoped in the stator unit. The circuit board is coupled to the stator unit, wherein the circuit board includes a circuit board connection port. The first restriction structure restricts the circuit board, wherein the first restriction structure is arranged on the first straight line, and the first restriction structure is disposed a first distance away from the axis. The second restriction structure restricts the circuit board, wherein the second restriction structure is arranged on the second straight line, the second restriction structure is disposed a second distance away from the axis.

Abstract: A method for performing wireless communication in MLO architecture is applicable to an AP MLD connected with a non-AP MLD through multiple links. The multiple links include at least a first link and a second link, the non-AP MLD operates in ML-SMPS mode. The method includes transmitting an initial control frame to the non-AP MLD via the first link, to trigger at least one link of the multiple links to be activated at the non-AP MLD to support a reception with respective negotiated number of spatial streams, receiving a response frame via the first link in response to the transmission of the initial control frame, and initiating frame exchange between the AP MLD and the non-AP MLD via a target link of the at least one link. The target link is selected from the at least one link according to the response frame. The first link is a primary link.

Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: The present disclosure generally relates to memory devices and methods of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices incorporating reference cells for achieving high sensing yield. The present disclosure provides a memory device including a main cell structure including a switching element arranged between a pair of conductors, and a reference cell structure electrically coupled to the main cell structure. The reference cell structure includes a switching element arranged between a pair of conductors, in which the switching element of the reference cell structure has a dimension that is different from a dimension of the switching element of the main cell structure.

Abstract: Method and apparatus for affine CPMV or ALF refinement are mentioned. According to this method, statistical data associated with the affine CPMV or ALF refinement are collected over a picture area. Updated parameters for the affine CPMV refinement or the ALF refinement are then derived based on the statistical data, where a process to derive the updated parameters includes performing multiplication using a reduced-precision multiplier for the statistical data. The reduced-precision multiplier truncates at least one bit of the mantissa part. In another embodiment, the process to derive the updated parameters includes performing reciprocal for the statistical data using a lookup table with (m?k)-bit input by truncating k bits from the m-bit mantissa part, and contents of the lookup table includes m-bit outputs. m and k are positive integers.

Abstract: A tiled display device includes two panels and two cover layers respectively disposed on the two panels. The two cover layers include a contact region. A top portion and a bottom portion of the contact region have a height H. One of the two cover layers has a thickness Tn. One of the two panels has a distance Xn between an upper surface of the one of the two panels and the bottom portion of the contact region. The one of the two panels is corresponding to the one of the two cover layers. The height H, the thickness Tn and the distance Xn satisfy the equation: 0<H/(Xn+Tn)<0.8.

Abstract: A method for adjusting a projection parameter and a projection system are disclosed. In the projection system, a processor is configured to drive multiple projectors to project multiple projection images respectively and obtain a full projection range through calculation, select a target area from at least one overlapping area included in the full projection range and obtain a target projection parameter value of the target area, obtain multiple intersection points of the overlapping area on a boundary of the full projection range, define connecting lines between a center point of the target area and the intersection points as dividing lines to divide the full projection range into multiple sub-areas, respectively adjust a projection parameter value of each of the sub-areas according to the target projection parameter value of the target area, and perform projection through the corresponding projector based on the adjusted projection parameter value of each of the sub-areas.

Abstract: An electronic device includes a first substrate structure, multiple electronic elements and a second substrate structure. The first substrate structure includes a first substrate. The electronic elements are disposed on the first substrate. The second substrate structure is coupled to the first substrate structure. The second substrate structure includes a second substrate, a protection circuit, a driving circuit and a bonding pad. The protection circuit is disposed on the second substrate. The driving circuit is disposed on the second substrate and configured to drive at least a part of the electronic elements. The bonding pad is disposed on the second substrate. The protection circuit is respectively coupled to the bonding pad and the driving circuit. The electronic device may reduce the damage caused by electrostatic discharge or reduce the impact of the bonding process of the bonding pad on signal conduction.

Abstract: An association management method includes: after coordination association between a client and a plurality of member APs in a multi-access point (MAP) system is successfully completed, generating a request frame to manage association between the client and a member AP in the MAP system. For example, the request frame may be initiated by the client. For another example, the request frame may be initiated by the member AP.

Abstract: An electrical connection structure is provided. The electrical connection structure includes a through hole, a first pad, a second pad and a conductive bridge. The through hole has a first end and a second end. The first pad at least partially surrounds the first end of the through hole and is electrically connected to a first circuit. The second pad is located at the second end of the through hole and is electrically connected to a second circuit. The conductive bridge is connected to the first pad and second pad through the through hole, thereby making the first and second circuits electrically connected to each other.

Abstract: A probiotic composition for improving an effect of a chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is disclosed in the present disclosure. The probiotic composition comprises an effective amount of Lactobacillus paracasei GMNL-133, an effective amount of Lactobacillus reuteri GMNL-89, and a pharmaceutically acceptable carrier, wherein the Lactobacillus paracasei GMNL-133 was deposited in the China Center for Type Culture Collection on Sep. 26, 2011 under an accession number CCTCC NO. M 2011331, and the Lactobacillus reuteri GMNL-89 was deposited in the China Center for Type Culture Collection on Nov. 19, 2007 under an accession number CCTCC NO. M 207154. A method for improving the effect of the chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is further disclosed in the present disclosure.

Abstract: A package structure including a first die, a second die, a dielectric body, a conductive terminal, a circuit layer and a patterned insulating layer is provided. The second die is disposed on the first die. A second active surface of the second die faces a first active surface of the first die. The dielectric body covers the first die. The conductive terminal is disposed on the dielectric body and opposite to the second die. The circuit layer includes a first circuit portion and a second circuit portion. The first circuit portion penetrates the dielectric body. The first die is electrically connected to the conductive terminal through the first circuit portion. The second circuit portion is embedded in the dielectric body. The second die is electrically connected to the first die through the second circuit portion. The patterned insulating layer covers the circuit layer and is embedded in the dielectric body.

Abstract: A multi-phase coupled inductor includes a first iron core, a second iron core, and a plurality of coil windings. The first iron core includes a first body and a plurality of first core posts. The plurality of first core posts are connected to the first body. The second iron core is opposite to the first iron core. The second iron core and the first body are spaced apart from each other by a gap. The plurality of coil windings wrap around the plurality of first core posts, respectively. Each of the coil windings has at least two coils.