Patents by Inventor Chun-I Tseng

Chun-I Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11474136
    Abstract: A method for examining differential pair transmission lines, performed by a processor, comprising: capturing a plurality of first insertion losses of a first signal line within a frequency range and a plurality of second insertion losses of a second signal line within the frequency range, wherein the first signal line and the second signal line are configured to transmit a pair of differential signals; calculating a plurality of maximum error ratios between the first insertion losses and the second insertion losses within the frequency range; determining whether any one of the maximum error ratios is greater than or equal to an upper threshold; outputting a warning signal when the processor determines one of the maximum error ratios is greater than or equal to the upper threshold; and ending the method when the processor determines each one of the maximum error ratios is smaller than the upper threshold.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: October 18, 2022
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Chun I Tseng, Yen-Hao Chen
  • Publication number: 20210072299
    Abstract: A method for examining differential pair transmission lines, performed by a processor, comprising: capturing a plurality of first insertion losses of a first signal line within a frequency range and a plurality of second insertion losses of a second signal line within the frequency range, wherein the first signal line and the second signal line are configured to transmit a pair of differential signals; calculating a plurality of maximum error ratios between the first insertion losses and the second insertion losses within the frequency range; determining whether any one of the maximum error ratios is greater than or equal to an upper threshold; outputting a warning signal when the processor determines one of the maximum error ratios is greater than or equal to the upper threshold; and ending the method when the processor determines each one of the maximum error ratios is smaller than the upper threshold.
    Type: Application
    Filed: December 13, 2019
    Publication date: March 11, 2021
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Chun I TSENG, Yen-Hao CHEN
  • Patent number: 10219366
    Abstract: A multilayer printed circuit board includes an inner circuit layer, a first outer circuit layer, a second outer circuit layer, a via, and a layer of high dielectric dissipation solder resist ink. The first outer circuit layer includes a first trace for transmitting a high frequency signal. The inner circuit layer includes a second trace, and is formed between the first outer circuit layer and the second outer circuit layer. The via is formed from the first outer circuit layer to the second outer circuit layer, and is coupled to the first trace and the second trace. The second trace is coupled to the first trace through the via for transmitting the high frequency signal. The layer of high dielectric dissipation solder resist ink is formed on a terminal of the open stub of the via exposed outside of the second outer circuit layer.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: February 26, 2019
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Chun-I Tseng, Mu-Chih Chuang, Wei-Fan Ting, Yen-Hao Chen