Patents by Inventor Chun-Ming Chiu
Chun-Ming Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12009254Abstract: A method includes forming a first conductive feature on a substrate, forming a via that contacts the first conductive feature, the via comprising a conductive material, performing a Chemical Mechanical Polishing (CMP) process to a top surface of the via, depositing an Interlayer Dielectric (ILD) layer on the via, forming a trench within the ILD layer to expose the via, and filling the trench with a second conductive feature that contacts the via, the second conductive feature comprising a same material as the conductive material.Type: GrantFiled: May 16, 2022Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-Yuan Chen, Shih-Chuan Chiu, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin
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Publication number: 20240181127Abstract: A bone substitute composition includes a bone substitute matrix and a conditioning solution. The bone substitute matrix includes 85% to 98% by weight of alkaline calcium phosphate powder, 1% to 10% by weight of a polymer, and 1% to 5% by weight of a crosslinker. The conditioning solution includes 90% to 97% by weight of water, 1% to 5% by weight of a phosphate, and 1% to 5% by weight of a water-soluble acidic compound.Type: ApplicationFiled: March 20, 2023Publication date: June 6, 2024Inventors: Kuan-Yu CHIU, Yen-Hao CHANG, Chun-Chieh TSENG, Tung-Lin TSAI, Chun-Ming CHEN, Yue-Jun WANG, Tzyy-Ker SUE
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Publication number: 20240162094Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a conductive feature on the substrate, and an electrical connection structure on the conductive feature. The electrical connection includes a first grain made of a first metal material, and a first inhibition layer made of a second metal layer that is different than the first metal material. The first inhibition layer extends vertically along a first side of a grain boundary of the first grain and laterally along a bottom of the grain boundary of the first grain.Type: ApplicationFiled: January 5, 2024Publication date: May 16, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Chuan CHIU, Jia-Chuan YOU, Chia-Hao CHANG, Chun-Yuan CHEN, Tien-Lu LIN, Yu-Ming LIN, Chih-Hao WANG
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Publication number: 20240162114Abstract: A power module including at least one power device, an insulation thermally conductive layer, and a heat dissipation device is provided. The insulation thermally conductive layer has a patterned circuit layer. The power device is disposed on the patterned circuit layer and is electrically connected to the patterned circuit layer. The heat dissipation device includes a heat dissipation plate and a heat dissipation base. The heat dissipation plate has a first surface and a second surface opposite to each other, and the insulation thermally conductive layer is disposed on the first surface. The heat dissipation base is partially bonded to the heat dissipation plate, and a chamber is formed between the heat dissipation plate and the heat dissipation bases. The heat dissipation base has a plurality of first heat dissipation bumps located in the chamber.Type: ApplicationFiled: February 9, 2023Publication date: May 16, 2024Applicant: Industrial Technology Research InstituteInventors: Shian-Chiau Chiou, Chun-Kai Liu, Po-Kai Chiu, Chih-Ming Tzeng, Yao-Shun Chen
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Publication number: 20240155807Abstract: A two-phase immersion-type heat dissipation structure having acute-angle notched structures is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins has first and second surfaces defined thereon and connected to each other. An angle between the first surface and the fin surface is from 80 degrees to 100 degrees, and an angle between the second surface and the fin surface is less than 75 degrees.Type: ApplicationFiled: November 4, 2022Publication date: May 9, 2024Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
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Publication number: 20240155808Abstract: A two-phase immersion-cooling heat-dissipation composite structure is provided. The heat-dissipation composite structure includes a heat dissipation base, a plurality of high-thermal-conductivity fins, and at least one high-porosity solid structure. The heat dissipation base has a first surface and a second surface that face away from each other. The second surface of the heat dissipation base is in contact with a heating element immersed in a two-phase coolant. The first surface of the heat dissipation base is connected to the high-thermal-conductivity fins. The at least one high-porosity solid structure is located at the first surface of the heat dissipation base, and is connected and alternately arranged between side walls of two adjacent ones of the high-thermal-conductivity fins. Each of the high-porosity solid structure includes a plurality of closed holes and a plurality of open holes.Type: ApplicationFiled: November 4, 2022Publication date: May 9, 2024Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
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Publication number: 20240155809Abstract: A two-phase immersion-type heat dissipation structure having fins for facilitating bubble generation is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the plurality of fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins and the fin surface have an included angle therebetween that is from 80 degrees to 100 degrees. A center line average roughness (Ra) of the side surface is less than 3 ?m, and a ten-point average roughness (Rz) of the side surface is not less than 12 ?m.Type: ApplicationFiled: November 6, 2022Publication date: May 9, 2024Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
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Publication number: 20240142181Abstract: A two-phase immersion-type heat dissipation structure having skived fin with high porosity is provided. The two-phase immersion-type heat dissipation structure having skived fin with high porosity includes a porous heat dissipation structure having a total porosity that is equal to or greater than 5%. The porous heat dissipation structure includes a porous substrate and a plurality of porous and skived fins. The porous substrate has a first surface and a second surface that face away from each other. The second surface of the porous substrate is configured to be in contact with a heating element that is immersed in a two-phase coolant. The plurality of porous and skived fins are integrally formed on the first surface of the porous substrate by skiving. A first porosity of the plurality of porous and skived fins is greater than a second porosity of the porous substrate.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
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Patent number: 11955515Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.Type: GrantFiled: July 28, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
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Patent number: 11942543Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: GrantFiled: June 29, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
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Publication number: 20230348673Abstract: The present disclosure provides a toughened resin composition, which includes: (A) a toughened and modified compound, which includes a styrene maleic anhydride compound, an anhydride grafted olefin polymer, and a diisocyanate compound; (B) a thermosetting polymer; and (C) a toughening resin; wherein, in the toughened and modified compound, the diisocyanate compound forms a polyimide bond with the styrene maleic anhydride compound and the anhydride grafted olefin polymer, respectively. The present disclosure has high toughness and excellent mechanical properties; thus, it may have a wide range of applications in the fields of electronics, aerospace and the like.Type: ApplicationFiled: October 12, 2022Publication date: November 2, 2023Inventors: Sheng-Yen WU, Po-Hsun LEE, Chun-Ming CHIU, Wen-Pin SU, Jui-Teng HSU, Chen-Yu HUANG, Chun-Han LIN
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Patent number: 11476199Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.Type: GrantFiled: March 14, 2021Date of Patent: October 18, 2022Assignee: Unimicron Technology Corp.Inventors: Yi Lin, Chun-Ming Chiu, Hung-Chih Lee, Chang-Fu Chen
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Publication number: 20210202394Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.Type: ApplicationFiled: March 14, 2021Publication date: July 1, 2021Inventors: Yi LIN, Chun-Ming CHIU, Hung-Chih LEE, Chang-Fu CHEN
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Patent number: 10978401Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.Type: GrantFiled: June 6, 2018Date of Patent: April 13, 2021Assignee: Unimicron Technology Corp.Inventors: Yi Lin, Chun-Ming Chiu, Hung-Chih Lee, Chang-Fu Chen
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Patent number: 10652996Abstract: A shielding film comprises multiple layers including one or more of a structured adhesive layer, an electrically conductive layer, an electrically insulative thermally conductive layer, and an electrically conductive adhesive layer. The electrically conductive shielding layer extends laterally beyond the structured adhesive layer. The electrically insulative thermally conductive layer is disposed between the electrically conductive shielding layer and the structured adhesive layer and is coextensive with the structured adhesive layer. The electrically conductive adhesive layer is disposed between the electrically conductive shielding layer and the thermally conductive layer and is coextensive with the electrically conductive shielding layer.Type: GrantFiled: November 16, 2016Date of Patent: May 12, 2020Assignee: 3M INNOVATIVE PROPERTIES COMPANYInventors: Chun-Ming Chiu, Wei-Yu Chen, I-Liang Lee
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Publication number: 20190279936Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.Type: ApplicationFiled: June 6, 2018Publication date: September 12, 2019Inventors: Yi LIN, Chun-Ming CHIU, Hung-Chih LEE, Chang-Fu CHEN
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Publication number: 20170181268Abstract: A shielding film comprises multiple layers including one or more of a structured adhesive layer, an electrically conductive layer, an electrically insulative thermally conductive layer, and an electrically conductive adhesive layer. The electrically conductive shielding layer extends laterally beyond the structured adhesive layer. The electrically insulative thermally conductive layer is disposed between the electrically conductive shielding layer and the structured adhesive layer and is coextensive with the structured adhesive layer. The electrically conductive adhesive layer is disposed between the electrically conductive shielding layer and the thermally conductive layer and is coextensive with the electrically conductive shielding layer.Type: ApplicationFiled: November 16, 2016Publication date: June 22, 2017Inventors: Chun-Ming Chiu, Wei-Yu Chen, I-Liang Lee
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Publication number: 20160303838Abstract: A transparent multilayer assembly, including a transparent organic polymeric flexible substrate, a transparent conductive layer on the first major surface of the substrate and an antireflective layer on the second major surface of the substrate.Type: ApplicationFiled: December 8, 2014Publication date: October 20, 2016Inventors: Wan-Chun Chen, Chun-Ming Chiu, Hui Luo, Tze Yuan Wang, Ta-Hua Yu
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Patent number: 8643558Abstract: A multi-frequency antenna (1) includes a grounding portion (1) extending along a transversal direction; a radiating arm (11) extending along a transversal direction and disposed above the grounding portion; a connecting arm (12) connected to the grounding portion and the radiating arm; a capacitor (13) connected to the radiating portion and the connecting arm; and a cable (15) having an inner conductor connected to the connecting arm and an outer conductor connected to the grounding portion.Type: GrantFiled: March 23, 2011Date of Patent: February 4, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Hsien-Sheng Tseng, Chun-Ming Chiu, Wen-Fong Su
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Patent number: D1027182Type: GrantFiled: August 15, 2022Date of Patent: May 14, 2024Assignees: Interface Technology (ChengDu) Co., Ltd., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITEDInventors: Chun-Ming Cheng, Chih-Lin Liao, Yi-Chia Chiu, Chun-Ta Chen, Po-Lun Chen