Abstract: An amplitude modulation circuit in a polar transmitter includes a digital-to-analog converter (DAC), a filter, a gm stage, and a calibration module. The DAC is arranged to be coupled to an amplitude modulation signal input in a normal mode. The filter is coupled to the DAC, and the gm stage is coupled to the filter. The calibration module has an input coupled to the gm stage, and an output coupled to a node on a path between the DAC and the gm stage. A method for calibrating an amplitude offset in the polar transmitter includes: generating an amplitude offset calibration signal according to an amplitude modulation signal generated from the gm stage; and transmitting the amplitude offset calibration signal via the output of the calibration module to a node on a path between the DAC and the gm stage so as to calibrate the amplitude offset.

Abstract: An exemplary embodiment of a full division duplex system comprises a receiver, a transmitter and an auxiliary circuit. The receiver receives an inbound RF signal of a first band to generate an inbound baseband signal, and the transmitter up converts an outbound baseband signal by an oscillation signal to generate an outbound RF signal of a second band for transmission. The auxiliary circuit calculates leakages from the outbound RF signal to generate a blocker replica, in which a LNA is coupled to a non-conductive coupling path extended from the input of receiver to collect leakages from the outbound RF signal to produce an induction signal. The induction signal is down converted to perform an adjustment, and thereafter up converted again to generate the blocker replica. In this way, the inbound baseband signal is generated from a subtraction of the inbound RF signal and the blocker replica.

Abstract: A transmitter for transmitting and calibrating a phase signal and an amplitude signal. The transmitter comprises a phase modulation path, an amplitude modulation path, and a control unit. The phase modulation path transmits the phase signal. The amplitude modulation path transmits the amplitude signal. The control unit delays the signal on at least one of the phase modulation path and the amplitude modulation.

Abstract: A signal processing circuit includes: a phase modulating path arranged to adjust a phase component of an input signal to generate an adjusted phase component such that a phase difference of the input signal falls within a target phase difference range; and an amplitude modulating path arranged to exchange a sign of an amplitude component of the input signal corresponding to the phase component to generate an adjusted amplitude component when the phase modulating path adjusts the phase component.

Abstract: An amplitude modulation circuit in a polar transmitter includes a digital-to-analog converter (DAC), a filter, a gm stage, and a calibration module. The DAC is arranged to be coupled to an amplitude modulation signal input in a normal mode. The filter is coupled to the DAC, and the gm stage is coupled to the filter. The calibration module has an input coupled to the gm stage, and an output coupled to a node on a path between the DAC and the gm stage. A method for calibrating an amplitude offset in the polar transmitter includes: generating an amplitude offset calibration signal according to an amplitude modulation signal generated from the gm stage; and transmitting the amplitude offset calibration signal via the output of the calibration module to a node on a path between the DAC and the gm stage so as to calibrate the amplitude offset.

Abstract: A transmitter for transmitting and calibrating a phase signal and an amplitude signal. The transmitter comprises a phase modulation path, an amplitude modulation path, and a control unit. The phase modulation path transmits the phase signal. The amplitude modulation path transmits the amplitude signal. The control unit delays the signal on at least one of the phase modulation path and the amplitude modulation.

Abstract: An amplitude modulation circuit in a polar transmitter and a method for calibrating amplitude offset in the polar transmitter are provided. The amplitude modulation circuit includes a digital-to-analog converter (DAC), a low pass filter (LPF), a gm stage, and a calibration module. The DAC is coupled to an amplitude modulation signal input. The LPF is coupled to the DAC, and the gm stage is coupled to the LPF. The calibration module has an input coupled to the gm stage, and an output coupled to a node on a path between the DAC and the gm stage. The method includes: generating an amplitude offset calibration signal according to an amplitude modulation signal generated from the gm stage; and transmitting the amplitude offset calibration signal via the output of the calibration module to a node on a path between the DAC and the gm stage so as to calibrate the amplitude offset.

Abstract: A transmitter for transmitting and calibrating a phase signal and an amplitude signal. The transmitter comprises a phase modulation path, an amplitude modulation path, and a control unit. The phase modulation path transmits the phase signal. The amplitude modulation path transmits the amplitude signal. The control unit delays the signal on at least one of the phase modulation path and the amplitude modulation.

Abstract: A signal processing circuit includes: a phase modulating path arranged to adjust a phase component of an input signal to generate an adjusted phase component such that a phase difference of the input signal falls within a target phase difference range; and an amplitude modulating path arranged to exchange a sign of an amplitude component of the input signal corresponding to the phase component to generate an adjusted amplitude component when the phase modulating path adjusts the phase component.

Abstract: A frequency synthesizer includes a fractional N phase locked loop (PLL), a sigma delta modulator, a phase adjustor and an adjust signal generator. The fractional N PLL generates an output signal according to an adjusted reference signal. A frequency of the output signal is a multiple of a frequency of a reference signal. The fractional N PLL includes a crystal oscillator generating the reference signal and a divider frequency dividing the output signal according to the multiple to generate a feedback signal. The sigma delta modulator generates a control signal to adjust the multiple accordingly. The phase adjustor adjusts a phase of the reference signal according to an adjust signal to generate the adjusted reference signal. The adjust signal generator generates the adjust signal according to an accumulation result of the sigma delta modulator.

Abstract: A signal processing circuit includes: a first operation circuit for receiving a phase component of an input signal, and generating an adjusted phase component and at least one weighting factor according to the phase component of the input signal; a second operation circuit, coupled to the first operation circuit, for receiving the adjusted phase component and converting the adjusted phase component into a frequency component corresponding to the adjusted phase component; a third operation circuit, coupled to the first operation circuit, for receiving an amplitude component of the input signal, and adjusting the amplitude component according to the at least one weighting factor to generate an adjusted amplitude component; and a fourth operation circuit, coupled to the second operation circuit and the third operation circuit, for generating an output signal according to the frequency component and the adjusted amplitude component.

Abstract: An exemplary embodiment of a full division duplex system comprises a receiver, a transmitter and an auxiliary circuit. The receiver receives an inbound RF signal of a first band to generate an inbound baseband signal, and the transmitter up converts an outbound baseband signal by an oscillation signal to generate an outbound RF signal of a second band for transmission. The auxiliary circuit calculates leakages from the outbound RF signal to generate a blocker replica, in which a LNA is coupled to a non-conductive coupling path extended from the input of receiver to collect leakages from the outbound RF signal to produce an induction signal. The induction signal is down converted to perform an adjustment, and thereafter up converted again to generate the blocker replica. In this way, the inbound baseband signal is generated from a subtraction of the inbound RF signal and the blocker replica.

Abstract: A signal processing circuit includes: a first operation circuit for receiving a phase component of an input signal, and generating an adjusted phase component and at least one weighting factor according to the phase component of the input signal; a second operation circuit, coupled to the first operation circuit, for receiving the adjusted phase component and converting the adjusted phase component into a frequency component corresponding to the adjusted phase component; a third operation circuit, coupled to the first operation circuit, for receiving an amplitude component of the input signal, and adjusting the amplitude component according to the at least one weighting factor to generate an adjusted amplitude component; and a fourth operation circuit, coupled to the second operation circuit and the third operation circuit, for generating an output signal according to the frequency component and the adjusted amplitude component.

Abstract: An exemplary embodiment of a full division duplex system comprises a receiver, a transmitter and an auxiliary circuit. The receiver receives an inbound RF signal of a first band to generate an inbound baseband signal, and the transmitter up converts an outbound baseband signal by an oscillation signal to generate an outbound RF signal of a second band for transmission. The auxiliary circuit calculates leakages from the outbound RF signal to generate a blocker replica, in which a LNA is coupled to a non-conductive coupling path extended from the input of receiver to collect leakages from the outbound RF signal to produce an induction signal. The induction signal is down converted to perform an adjustment, and thereafter up converted again to generate the blocker replica. In this way, the inbound baseband signal is generated from a subtraction of the inbound RF signal and the blocker replica.

Abstract: An amplitude modulation circuit in a polar transmitter and a method for calibrating amplitude offset in the polar transmitter are provided. The amplitude modulation circuit includes a digital-to-analog converter (DAC), a low pass filter (LPF), a gm stage, and a calibration module. The DAC is coupled to an amplitude modulation signal input. The LPF is coupled to the DAC, and the gm stage is coupled to the LPF. The calibration module has an input coupled to the gm stage, and an output coupled to a node on a path between the DAC and the gm stage. The method includes: generating an amplitude offset calibration signal according to an amplitude modulation signal generated from the gm stage; and transmitting the amplitude offset calibration signal via the output of the calibration module to a node on a path between the DAC and the gm stage so as to calibrate the amplitude offset.

Abstract: A transmitter for transmitting and calibrating a phase signal and an amplitude signal. The transmitter comprises a phase modulation path, an amplitude modulation path, and a control unit. The phase modulation path transmits the phase signal. The amplitude modulation path transmits the amplitude signal. The control unit delays the signal on at least one of the phase modulation path and the amplitude modulation.

Abstract: An exemplary embodiment of a full division duplex system comprises a receiver, a transmitter and an auxiliary circuit. The receiver receives an inbound RF signal of a first band to generate an inbound baseband signal, and the transmitter up converts an outbound baseband signal by an oscillation signal to generate an outbound RF signal of a second band for transmission. The auxiliary circuit calculates leakages from the outbound RF signal to generate a blocker replica, in which a LNA is coupled to a non-conductive coupling path extended from the input of receiver to collect leakages from the outbound RF signal to produce an induction signal. The induction signal is down converted to perform an adjustment, and thereafter up converted again to generate the blocker replica. In this way, the inbound baseband signal is generated from a subtraction of the inbound RF signal and the blocker replica.