Abstract: A display control method applicable to an all-in-one (AIO) computer is provided. The AIO computer includes a first monitor and a second monitor. The display control method includes: receiving a control instruction from the first monitor; projecting a display content on the second monitor according to the control instruction; and selectively enabling a touch control function of the second monitor according to the control instruction.

Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a dielectric structure sandwiched between a first electrode and a bottom electrode. A passivation layer overlies the second electrode and the dielectric structure. The passivation layer comprises a horizontal surface vertically below a top surface of the passivation layer. The horizontal surface is disposed above a top surface of the dielectric structure.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.

Abstract: A virtual reality tracker includes a first part and a second part. The first part includes a plurality of first light-emitting diodes (LEDs) and an inner measurement unit (IMU). The inertial measurement unit is used for measuring the acceleration and the triaxial angular velocity of the first part. The second part includes a plurality of second light-emitting diodes. Moreover, the first part and the second part are connected by a flexible component.

Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.

Abstract: Touch display device includes a first touch electrode, a second touch electrode, and a first touch signal line. First touch electrode is located in a first area of touch display device and is configured to receive a first control signal to generate a first touch signal. Second touch electrode is located in a second area of touch display device and is configured to receive a second control signal to generate a second touch signal. First area is adjacent to second area without overlapping. First touch signal line is coupled to first touch electrode and second touch electrode. First touch signal line is configured to transmit first touch signal of first area at a first stage. First touch signal line is configured to transmit a common electrode signal at a second stage. First touch signal line is configured to transmit second touch signal of second area at a third stage.

Abstract: A touch panel includes a substrate, touch signal lines, sub-pixels, touch electrode groups, and at least one common signal array. The touch signal lines and the sub-pixels are located on substrate. Each of the sub-pixels includes a switch element and a pixel electrode. The switch element is electrically connected to a corresponding scan line and a corresponding data line. The touch electrode groups include touch electrodes. The touch electrodes overlap the pixel electrodes of the sub-pixels. Each of the touch electrode groups is electrically connected to a corresponding one of the touch signal lines. The common signal array includes common electrodes. Each of the common electrodes overlaps at least one of the scan line and the data line. The number of the sub-pixels overlapped by the common signal array is greater than the number of the sub-pixels overlapped by each of the touch electrode groups.

Abstract: A touch panel includes a substrate, touch signal lines, sub-pixels, touch electrode groups, and at least one common signal array. The touch signal lines and the sub-pixels are located on substrate. Each of the sub-pixels includes a switch element and a pixel electrode. The switch element is electrically connected to a corresponding scan line and a corresponding data line. The touch electrode groups include touch electrodes. The touch electrodes overlap the pixel electrodes of the sub-pixels. Each of the touch electrode groups is electrically connected to a corresponding one of the touch signal lines. The common signal array includes common electrodes. Each of the common electrodes overlaps at least one of the scan line and the data line. The number of the sub-pixels overlapped by the common signal array is greater than the number of the sub-pixels overlapped by each of the touch electrode groups.

Abstract: An identification device and an identification setting system are provided. The identification setting system includes the identification device and a reader. The identification device switches a plurality of receiving frequencies to receive at least one of a plurality of setting data. The identification device performs a plurality of setting operations according to the plurality of setting data to obtain a plurality of pieces of identification information, and performs a plurality of different sensing identification operations according to the plurality of pieces of identification information.

Abstract: A display panel and a pixel circuit thereof are provided. The display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixel circuits. Each of the pixel circuits is coupled to corresponding gate line and data line. Each of the pixel circuits includes a first gate line and a pull-low switch. The first gate line is coupled to a control terminal of a driving transistor, and provides a first gate signal to drive the driving transistor during a driving time period. The pull-low switch pulls low the first gate signal to a reference low voltage according to a second gate signal on a second gate line when the driving time period finishes.

Abstract: A pixel structure includes a first, second and third electrode layers and a switch element. The second electrode layer is disposed above the first electrode layer and includes a first and second main body portions and a first and second branch portions. The first main body portion and the first branch portion extend in a first direction. The first branch portion protrudes from the first to second main body portion. The second branch portion protrudes from the second to first main body portion. The third electrode layer is disposed above the second electrode layer and includes a third and fourth main body portion and a third branch portion. The third and fourth main body portions extend in the first direction. The third branch portion connects the third to fourth main body portion. The switch element is electrically connected to the first or third electrode layer.

Abstract: A pixel structure including a substrate, a signal line, a plurality of pixel units and a light blocking pattern layer is provided. The signal line is disposed on the substrate and has opposing first and second sides. Two adjacent pixel units are disposed respectively on the first side and the second side of the signal line. Each pixel units includes an active device, a common electrode, an insulating layer, and a pixel electrode. The insulating layer is located on the common electrode. The pixel electrode is located on the insulating layer and is electrically connected to the active device. The pixel electrode includes an edge strip electrode and a plurality of extension electrodes. The extension electrodes respectively extend from the edge strip electrode toward the signal line. The light blocking pattern layer is located between two adjacent pixel units, and the light blocking pattern layer and the signal line overlap with each other.

Abstract: A pixel structure includes a first, second and third electrode layers and a switch element. The second electrode layer is disposed above the first electrode layer and includes a first and second main body portions and a first and second branch portions. The first main body portion and the first branch portion extend in a first direction. The first branch portion protrudes from the first to second main body portion. The second branch portion protrudes from the second to first main body portion. The third electrode layer is disposed above the second electrode layer and includes a third and fourth main body portion and a third branch portion. The third and fourth main body portions extend in the first direction. The third branch portion connects the third to fourth main body portion. The switch element is electrically connected to the first or third electrode layer.

Abstract: A pixel structure including a substrate, a signal line, a plurality of pixel units and a light blocking pattern layer is provided. The signal line is disposed on the substrate and has opposing first and second sides. Two adjacent pixel units are disposed respectively on the first side and the second side of the signal line. Each pixel units includes an active device, a common electrode, an insulating layer, and a pixel electrode. The insulating layer is located on the common electrode. The pixel electrode is located on the insulating layer and is electrically connected to the active device. The pixel electrode includes an edge strip electrode and a plurality of extension electrodes. The extension electrodes respectively extend from the edge strip electrode toward the signal line. The light blocking pattern layer is located between two adjacent pixel units, and the light blocking pattern layer and the signal line overlap with each other.

Abstract: A display panel and a pixel circuit thereof are provided. The display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixel circuits. Each of the pixel circuits is coupled to corresponding gate line and data line. Each of the pixel circuits includes a first gate line and a pull-low switch. The first gate line is coupled to a control terminal of a driving transistor, and provides a first gate signal to drive the driving transistor during a driving time period. The pull-low switch pulls low the first gate signal to a reference low voltage according to a second gate signal on a second gate line when the driving time period finishes.

Abstract: Provided herein is an optical protection element replacement system of a security camera device, including a security camera device and a replacement device. The lens of the security camera device is covered by a part of an elastic optical protection element. The processing unit compares the captured images with a preset condition, and generates a driving signal if the captured image does not match the preset condition. The replacement device includes a retrieving module and a dispensing module. The retrieving module pulls back a preset length of the elastic optical protection element based on the driving signal. The dispensing module accommodates and dispenses the elastic optical protection element. Therefore, the front side of the security camera device stays clean so that it may continuously provide high quality images. Further equivalent methods are also provided for the same purpose.

Abstract: An array substrate includes a substrate, data lines, gate lines, at least one pixel electrode, at least one common electrode, at least one light-shielding pattern, and at least one auxiliary electrode. At least one pixel region is defined by the data lines and the gate lines disposed and crossing with one another on the substrate. The pixel electrode, the common electrode, the light-shielding pattern, and the auxiliary electrode are disposed on the substrate and at least partially located in the pixel region. The pixel electrode includes at least one first branch electrode, and the common electrode includes at least one second branch electrode. The first branch electrode and the second branch electrode are disposed alternately in a first direction. The light-shielding pattern is disposed between a data line adjacent to the pixel region and the first branch electrode in the first direction.

Abstract: A pixel structure is provided. The pixel structure includes a scan line, a data line, an active device, a pixel electrode, and a common electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The pixel electrode includes multiple first layer pixel electrode patterns and multiple second layer pixel electrode patterns. The common electrode includes a plurality of first layer common electrode patterns and a plurality of second layer common electrode patterns. A fringe electric field is between each first layer pixel electrode pattern and corresponding portion of second layer common electrode patterns, and between each first layer common electrode pattern and corresponding portion of second layer pixel electrode patterns. A horizontal electric field is between each second layer pixel electrode pattern and the adjacent portion of second layer common electrode patterns.

Abstract: A display device includes a plurality of pixel units. Each of the pixel units at least includes three sub-pixels for displaying different colors. The three sub-pixels are electrically connected to three different gate lines, and at least two of the three sub-pixels are electrically connected to the same data line.