Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over a first portion of the fin structure, and an epitaxial region formed in a second portion of the fin structure. The epitaxial region can include a first semiconductor layer and an n-type second semiconductor layer formed over the first semiconductor layer. A lattice constant of the first semiconductor layer can be greater than that of the second semiconductor layer.

Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.

Abstract: Many unsupervised domain adaptation (UDA) methods have been proposed to bridge the domain gap by utilizing domain invariant information. Most approaches have chosen depth as such information and achieved remarkable successes. Despite their effectiveness, using depth as domain invariant information in UDA tasks may lead to multiple issues, such as excessively high extraction costs and difficulties in achieving a reliable prediction quality. As a result, we introduce Edge Learning based Domain Adaptation (ELDA), a framework which incorporates edge information into its training process to serve as a type of domain invariant information. Our experiments quantitatively and qualitatively demonstrate that the incorporation of edge information is indeed beneficial and effective, and enables ELDA to outperform the contemporary state-of-the-art methods on two commonly adopted benchmarks for semantic segmentation based UDA tasks.

Abstract: This disclosure relates to a polishing composition that includes an abrasive, at least two pH adjusters, a barrier film removal rate enhancer, a low-k removal rate inhibitor, and an azole-containing corrosion inhibitor. This disclosure also features a method of using the polishing composition to polish a substrate containing copper and silicon oxide.

Abstract: A dimming circuit is configured to generate a dimming signal to control a brightness of a light emitting device. The brightness is correlated with a duty ratio of the dimming signal. The dimming circuit is configured to count a conduction time of the dimming signal according to a programmable period count code and a programmable brightness code, based upon a fundamental frequency, wherein when the conduction time is less than a conduction time lower limit, based upon a down conversion ratio, the dimming circuit reduces a frequency of the dimming signal according to the programmable period count code and the programmable brightness code, wherein the down conversion ratio is greater than 1 to an extent where a dimming conduction time is greater than or equal to a conduction time lower threshold.

Abstract: The present disclosure provides a semiconductor structure with having a source/drain feature with a central cavity, and a source/drain contact feature formed in central cavity of the source/drain region, wherein the source/drain contact feature is nearly wrapped around by the source/drain region. The source/drain contact feature may extend to a lower most of a plurality semiconductor layers.

Abstract: A method for preparing quartz glass with low content of hydroxyl and high purity, includes providing silica powders including hydroxyl groups. The silica powders are dehydroxylated, which includes drying the silica powders at a first temperature, heating the silica powders up to a second temperature and introducing a first oxidizing gas including halogen gas, thereby obtaining first dehydroxylated powders, and heating the first dehydroxylated powders up to a third temperature and introducing a second oxidizing gas including oxygen or ozone, thereby obtaining second dehydroxylated powders. The second dehydroxylated powders are heated up to a fourth temperature to obtain a vitrified body. The vitrified body is cooled to obtain the quartz glass with low content of hydroxyl and high purity. The quartz glass prepared by the above method has low content of hydroxyl and high purity. A quartz glass with low content of hydroxyl and high purity is also provided.

Abstract: A method of fabricating an integrated circuit includes placing a first set of conductive feature patterns on a first level, placing a second set of conductive feature patterns on a second level, placing a first set of via patterns between the second set of conductive feature patterns and the first set of conductive feature patterns, placing a third set of conductive feature patterns on a third level different from the first level and the second level, placing a second set of via patterns between the third set of conductive feature patterns and the second set of conductive feature patterns, and manufacturing the integrated circuit based on at least one of the above patterns of the integrated circuit.

Abstract: In a method of manufacturing a semiconductor device including a Fin FET, a fin structure, which has an upper fin structure made of SiGe and a bottom fin structure made of a different material than the upper fin structure, is formed, a cover layer is formed over the fin structure, a thermal operation is performed on the fin structure covered by the cover layer, and a source/drain epitaxial layer is formed in a source/drain region of the upper fin structure. The thermal operation changes a germanium distribution in the upper fin structure.

Abstract: A light-emitting device includes a substrate, a semiconductor epitaxial structure, and an etch stop layer. The substrate has a first surface and a second surface opposite to the first surface. The semiconductor epitaxial structure has a side surface that has a roughened structure formed with protrusions, and includes a first type semiconductor layer, an active layer, and a second type semiconductor layer disposed on the first surface of the substrate in such order. The etch stop layer is disposed on a surface of the semiconductor epitaxial structure away from the substrate for preventing an etching solution from etching the semiconductor epitaxial structure. A light-emitting package and a light-emitting apparatus are also provided. A method for manufacturing a light-emitting device is also provided.

Abstract: A flat-top beam generating system may include a beamsplitting apparatus including one or more beamsplitters to split an input beam into three or more sub-beams that propagate along optical paths with different optical path lengths. The system may further include a diffractive optical element (DOE) to diffract the three or more sub-beams into a plurality of diffracted sub-beams. The system may further include one or more optical elements configured to collect the plurality of diffracted sub-beams to provide a flat-top beam.

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: An atomization device and a method of predicting atomization time for the same are provided. The atomization device includes a control module, an atomization module and a breathing sensing module. The method includes: configuring the breath sensing module to detect inhalations of a user using the atomization device, so as to generate initial breath data correspondingly; and configuring the control module to perform: comparing inhalation data of the initial breath data with a valid inhalation standard to obtain valid inhalation data and filter noise; statistically analyzing the valid inhalation data to generate a predicted value of inhalation time; calculating an atomization time according to the predicted value of the inhalation time; and generating a driving signal to drive the atomization module to perform atomization according to the atomization time.

Abstract: A method of moving a susceptor in a processing system, suitable for use in semiconductor processing, is provided. The method includes: moving a first susceptor from an interior volume of a first enclosure to an interior volume of a process chamber during a first time period; and positioning, during a second time period, a first substrate on the first susceptor when the first susceptor is in the process chamber, wherein the interior volume of the first enclosure and interior volume of the process chamber are maintained at a non-atmospheric pressure from the beginning of the first time period until the end of the second time period.

Abstract: A near-field communication (NFC) antenna system comprising an antenna, a plurality of chips, and an antenna matching network connected on one side to the plurality of chips and on another side to the antenna. Wherein only one of the plurality of chips is active at a time with inactive chips have an impedance set combined with the antenna matching network to provide antenna matching with the active chip. The NFC antenna inactive chips are set to open having a corresponding impedance and the impedance is set based on any of transmission line length, width, and gap between. The plurality of chips includes a charging chip and a payment chip.

Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.

Abstract: Devices, such as transistors, that use bismuth to create ohmic contacts are provided, as are methods of manufacturing the same. The transistors, such as field-effect transistors, can include one or more two-dimensional materials, and electrical contact areas can be created on the two-dimensional material(s) using bismuth. The bismuth can help to provide energy-barrier free, ohmic contacts, and the resulting devices can have performance levels that rival or exceed state-of-the-art devices that utilize three-dimensional materials, like silicon. The two-dimensional materials can include transition metal dichalcogenides, such as molybdenum disulfide.

Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over a first portion of the fin structure, and an epitaxial region formed in a second portion of the fin structure. The epitaxial region can include a first semiconductor layer and an n-type second semiconductor layer formed over the first semiconductor layer. A lattice constant of the first semiconductor layer can be greater than that of the second semiconductor layer.

Abstract: A semiconductor wafer processing system includes a stocker having an interior surface, a wafer carrier disposed within the stocker, a wafer shelf disposed within the wafer carrier for storing a semiconductor wafer, and a discharge circuit including a first conductor electrically coupled to the wafer shelf and a first current controller electrically coupled to the first conductor and to the interior surface of the stocker.