Patents by Inventor Chun Su

Chun Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153949
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip (IC). The method includes forming a first fin of semiconductor material and a second fin of semiconductor material within a semiconductor substrate. A gate structure is formed over the first fin and source/drain regions are formed on or within the first fin. The source/drain regions are formed on opposite sides of the gate structure. One or more pick-up regions are formed on or within the second fin. The source/drain regions respectively have a first width measured along a first direction parallel to a long axis of the first fin and the one or more pick-up regions respectively have a second width measured along the first direction. The second width is larger than the first width.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Hsin-Wen Su, Lien Jung Hung, Ping-Wei Wang, Wen-Chun Keng, Chih-Chuan Yang, Shih-Hao Lin
  • Publication number: 20240155291
    Abstract: Example implementations relate to computing device locations and computing devices having audio components thereon that change operational states. In some examples, a non-transitory computer-readable storage medium can include instructions that when executed cause a processor of an electronic device to determine a default host computing device of a plurality of computing devices, request a location of a first computing device of the plurality of computing devices using a sensor of the default host computing device, and request a location of a second computing device of the plurality of computing devices using the sensor. The instructions when executed can cause the processor to determine a first audio loop potential associated with the first computing device and a second audio loop potential associated with the second computing device, assign the first computing device as an active client and assign the second computing device as an inactive client.
    Type: Application
    Filed: April 13, 2021
    Publication date: May 9, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Yu-Hui Su, Chien-Pai Lai, Chung-Chun Chen, Peichen Chuang
  • Publication number: 20240152880
    Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.
    Type: Application
    Filed: February 13, 2023
    Publication date: May 9, 2024
    Applicant: OBOOK INC.
    Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chun-Jen Chen, Po-Hua Lin, Wei-Te Lin, Pei-Hsuan Weng, Mei-Su Wang, I-Cheng Lin, Cheng-Wei Chen
  • Patent number: 11979980
    Abstract: A first and second patterned circuit layer are formed on a first surface and a second surface of a base material. A first adhesive layer is formed on the first patterned circuit layer. A portion of the first surface is exposed by the first patterned circuit layer. The metal reflection layer covers the first insulation layer and a reflectance thereof is greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer, and the first adhesive layer is disposed between the first patterned circuit layer and the first insulation layer. A transparent adhesive layer and a protection layer are formed on the metal reflection layer. The transparent adhesive layer is disposed between the metal reflection layer and the protection layer. The protection layer comprises a transparent polymer. The light transmittance is greater than or equal to 80%.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: May 7, 2024
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Publication number: 20240131613
    Abstract: Disclosed is a dual heating type ultrasonic bonding apparatus including a stage, a part seating jig disposed on the stage, and an ultrasonic bonding unit disposed to correspond to the part seating jig and that bonds dissimilar parts seated on the part seating jig. The stage includes a first heater that transfers heat to the dissimilar parts through the part seating jig, and the ultrasonic bonding unit includes an ultrasonic horn that applies ultrasonic waves to the dissimilar parts, and a second heater coupled to the ultrasonic horn, and that transfers heat to the dissimilar parts through the ultrasonic horn.
    Type: Application
    Filed: March 16, 2023
    Publication date: April 25, 2024
    Applicant: WITS Co., Ltd.
    Inventors: Du Hyun SONG, Chun Su YOON
  • Patent number: 11967357
    Abstract: A memory unit with time domain edge delay accumulation for computing-in-memory applications is controlled by a first word line and a second word line. The memory unit includes at least one memory cell, at least one edge-delay cell multiplexor and at least one edge-delay cell. The at least one edge-delay cell includes a weight reader and a driver. The weight reader is configured to receive a weight and a multi-bit analog input voltage and generate a multi-bit voltage according to the weight and the multi-bit analog input voltage. The driver is connected to the weight reader and configured to receive an edge-input signal. The driver is configured to generate an edge-output signal having a delay time according to the edge-input signal and the multi-bit voltage. The delay time of the edge-output signal is positively correlated with the multi-bit analog input voltage multiplied by the weight.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: April 23, 2024
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Ping-Chun Wu, Li-Yang Hong, Jin-Sheng Ren, Jian-Wei Su
  • Publication number: 20240128211
    Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 18, 2024
    Inventors: Chih-Wei WU, An-Jhih SU, Hua-Wei TSENG, Ying-Ching SHIH, Wen-Chih CHIOU, Chun-Wei CHEN, Ming Shih YEH, Wei-Cheng WU, Der-Chyang YEH
  • Publication number: 20240107874
    Abstract: A compound is disclosed that has a metal coordination complex structure having at least two ligands coordinated to the metal; wherein the compound has a first substituent R1 at one of the ligands' periphery; wherein a first distance is defined as the distance between the metal and one of the atoms in R1 where that atom is the farthest away from the metal among the atoms in R1; wherein the first distance is also longer than any other atom-to-metal distance between the metal and any other atoms in the compound; and wherein when a sphere having a radius r is defined whose center is at the metal and the radius r is the smallest radius that will allow the sphere to enclose all atoms in the compound that are not part of R1, the first distance is longer than the radius r by at least 2.9 ?.
    Type: Application
    Filed: October 30, 2023
    Publication date: March 28, 2024
    Applicant: Universal Display Corporation
    Inventors: Eric A. MARGULIES, Zhiqiang JI, Jui-Yi TSAI, Chun LIN, Alexey Borisovich DYATKIN, Mingjuan SU, Bin MA, Michael S. WEAVER, Julia J. BROWN, Lichang ZENG, Walter YEAGER, Alan DEANGELIS, Chuanjun XIA
  • Patent number: 11942750
    Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
  • Patent number: 11942169
    Abstract: A semiconductor memory device includes a first word line formed over a first active region. In some embodiments, a first metal line is disposed over and perpendicular to the first word line, where the first metal line is electrically connected to the first word line using a first conductive via, and where the first conductive via is disposed over the first active region. In some examples, the semiconductor memory device further includes a second metal line and a third metal line both parallel to the first metal line and disposed on opposing sides of the first metal line, where the second metal line is electrically connected to a source/drain region of the first active region using a second conductive via, and where the third metal line is electrically connected to the source/drain region of the first active region using a third conductive via.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Wen Su, Kian-Long Lim, Wen-Chun Keng, Chang-Ta Yang, Shih-Hao Lin
  • Publication number: 20240093357
    Abstract: A semiconductor device is manufactured by modifying an electromagnetic field within a deposition chamber. In embodiments in which the deposition process is a sputtering process, the electromagnetic field may be modified by adjusting a distance between a first coil and a mounting platform. In other embodiments, the electromagnetic field may be adjusted by applying or removing power from additional coils that are also present.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Inventors: Jen-Chun Wang, Ya-Lien Lee, Chih-Chien Chi, Hung-Wen Su
  • Patent number: 11937370
    Abstract: A base material is provided. A first patterned circuit layer and a second patterned circuit layer are formed on a first surface and a second surface of the base material. A first insulation layer and a metal reflection layer are provided on the first patterned circuit layer and a portion of the first surface exposed by the first patterned circuit layer, wherein the metal reflection layer covers the first insulation layer, and a reflectance of the metal reflection layer is substantially greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer. A first ink layer is formed on the first insulation layer before the metal reflection layer is formed.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: March 19, 2024
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Publication number: 20240083137
    Abstract: Embodiments of this application provide a composite structure including a substrate layer and a functional layer disposed on a surface of at least one side of the substrate layer. The substrate layer includes a first support member and a second support member that are disposed side by side and a bendable connecting member connected to and disposed between the first support member and the second support member. A material of the first support member and the second support member includes a hard rubber fiber composite material, and the functional layer includes one or more of an electrically conductive layer, a thermally conductive layer, or an impact-resistant layer.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Yuan QIN, Yangyang LI, Chun ZOU, Weiwei YAO, Nanjian SUN, Taimeng CHEN, Zhaoliang SU
  • Publication number: 20240076417
    Abstract: The present disclosure provides a method for manufacturing an auto-crosslinked hyaluronic acid gel, comprising conducting auto-crosslinking reaction of a colloid containing hyaluronic acid continuously at low temperature in an acidic environment, and treating the reaction product with steam at high temperature to obtain the auto-crosslinked hyaluronic acid gel with high viscosity.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 7, 2024
    Applicant: SCIVISION BIOTECH INC.
    Inventors: TAI-SHIEN HAN, TSUNG-WEI PAN, TOR-CHERN CHEN, CHUN-CHANG CHEN, PO-HSUAN LIN, LI-SU CHEN
  • Publication number: 20240078432
    Abstract: A self-tuning model compression methodology for reconfiguring a Deep Neural Network (DNN) includes: receiving a pre-trained DNN model and a data set; performing an inter-layer sparsity analysis to generate a first sparsity result; and performing an intra-layer sparsity analysis to generate a second sparsity result, including: defining a plurality of sparsity metrics for the network; performing forward and backward passes to collect data corresponding to the sparsity metrics; using the collected data to calculate values for the defined sparsity metrics; and visualizing the calculated values using at least a histogram.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Applicant: Kneron Inc.
    Inventors: JIE WU, JUNJIE SU, BIKE XIE, Chun-Chen Liu
  • Patent number: 11915936
    Abstract: A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Su, Fu-Ting Yen, Ting-Ting Chen, Teng-Chun Tsai
  • Publication number: 20240055358
    Abstract: An electronic package includes a base of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the base and rotated relative to the base above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the base.
    Type: Application
    Filed: October 24, 2023
    Publication date: February 15, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Publication number: 20240048218
    Abstract: An example mobile computing device includes: an antenna capable of switching between a plurality of antenna patterns; an image sensor to capture image data representing an environment of the mobile computing device; a depth sensor to capture depth data representing the environment of the mobile computing device; a processor connected to the antenna, the image sensor and the depth sensor, the processor to: obtain the image data and the depth data; select a designated antenna pattern from the plurality of antenna patterns based on the image data and the depth data; and control the antenna to use the designated antenna pattern.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: Chin-Hung Ma, Huai-Yung Yen, Kun-Jung Wu, Xin-Chang Chen, Hsiao Chun Su
  • Patent number: 11889641
    Abstract: A display device includes a screen, a screen stand and a fixing module. The screen stand is pivotally connected to the screen. The fixing module is connected to the screen stand and configured to clamp a first surface and a second surface of a board and includes a connecting element, a first abutting element and a second abutting element. The first abutting element is fixed to the connecting element and configured to abut against the first surface of the board. The second abutting element is pivotally connected to the connecting element and includes an abutting end configured to abut against the second surface of the board.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: January 30, 2024
    Assignee: Qisda Corporation
    Inventors: Jen-Feng Chen, Ying-Yu Tsai, Kuan-Hsu Lin, Hsin-Hung Lin, Shih-An Lin, Yung-Chun Su, Hsin-Che Hsieh, Hao-Chun Tung, Yang-Zong Fan, Chih-Ming Chang