Patents by Inventor Chun-Ting Yeh

Chun-Ting Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996324
    Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: U-Ting Chiu, Po-Nan Yeh, Yu-Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20240162401
    Abstract: A method for fabricating a micro display device includes the steps of providing a wafer comprising a first area, a second area, and a third area, forming first bonding pads on the first area, forming second bonding pads on the second area, and forming third bonding pads on the third area. Preferably, the first bonding pads and the second bonding pads are made of different materials and the first bonding pads and the third bonding pads are made of different materials.
    Type: Application
    Filed: December 9, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chuan-Lan Lin, Yu-Ping Wang, Chien-Ting Lin, Chun-Ting Yeh
  • Publication number: 20240154447
    Abstract: A power system including a first battery pack, a second battery pack, and a power management circuit is disclosed. The first battery pack has a first end and a second end, and has a first battery capacity. The second battery pack has a third end and a fourth end. The third end is coupled to the second end of the first battery pack and provides a low battery voltage. The fourth end is grounded, the second battery pack has a second battery capacity, and the second battery capacity is greater than the first battery capacity. The power management circuit is coupled to the second battery pack to receive the low battery voltage, and provides a component operating voltage to an electronic components based on the low battery voltage.
    Type: Application
    Filed: August 29, 2023
    Publication date: May 9, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Yi-Hsuan Lee, Liang-Cheng Kuo, Chun-Wei Ko, Ya Ju Cheng, Chih Wei Huang, Ywh Woei Yeh, Yu Cheng Lin, Yen Ting Wang
  • Patent number: 11971609
    Abstract: A photographing optical system includes eight lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. The eight lens elements each have an object-side surface facing toward the object side and an image-side surface facing toward the image side. The first lens element has positive refractive power. The fifth lens element has positive refractive power. The object-side surface of the seventh lens element is convex in a paraxial region thereof. The image-side surface of the eighth lens element is concave in a paraxial region thereof. At least one lens surface of at least one lens element of the photographing optical system has at least one critical point in an off-axis region thereof.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: April 30, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chun-Yen Chen, Kuan-Ting Yeh, Tzu-Chieh Kuo
  • Publication number: 20240136183
    Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11914818
    Abstract: An electrical device and an operation control method are provided. The electronic device includes a touch module and a processor. The touch module includes a touchable region. The touchable region is divided into at least a first touchable region and a second touchable region. The first touchable region is configured to implement a first function. The second touchable region is configured to implement the first function and a second function. The processor is electrically connected to the touch module. When at least one first touch point is detected in the first touchable region, at least one second touch point is detected in the second touchable region, and the processor determines that a distance between the first touch point and the second touch point is within a predetermined distance, the second touchable region is switched to implementing the first function.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: February 27, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yao-Yu Tsai, Chun-Tsai Yeh, Ya-Ting Chen
  • Publication number: 20230231270
    Abstract: The present invention provides a separator formed by hydrolysis of a resin film. The resin film comprises a non-hydrolyzable organic polymer; and a hydrolyzable organic polymer being hydrolyzable by treatment with at least one of an acid aqueous solution, an alkaline aqueous solution and pure water, wherein the content of the hydrolyzable organic polymer ranges from 10 parts by weight to 70 parts by weight relative to 100 parts by weight of the resin film. The separator of the present invention has good ion conductivity and thus, is extremely suitable for use in various types of batteries.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 20, 2023
    Applicant: MICROCOSM TECHNOLOGY CO., LTD.
    Inventors: Chun-Ting Yeh, Chia Yun Wang, Sih-Ci Jheng
  • Publication number: 20230101900
    Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.
    Type: Application
    Filed: December 7, 2022
    Publication date: March 30, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
  • Patent number: 11569188
    Abstract: A semiconductor device, including a first semiconductor substrate and a second semiconductor substrate, is provided. A first bonding structure is located on the first semiconductor substrate and includes a first pad having an elongated shape. A second bonding structure is located on the second semiconductor substrate and includes a second pad having an elongated shape. The first semiconductor substrate is bonded to the second semiconductor substrate by bonding the first bonding structure and the second bonding structure. The first pad is bonded to the second pad, and an extension direction of the first pad is different from an extension direction of the second pad.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: January 31, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin
  • Patent number: 11557558
    Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: January 17, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
  • Publication number: 20220415836
    Abstract: A semiconductor device, including a first semiconductor substrate and a second semiconductor substrate, is provided. A first bonding structure is located on the first semiconductor substrate and includes a first pad having an elongated shape. A second bonding structure is located on the second semiconductor substrate and includes a second pad having an elongated shape. The first semiconductor substrate is bonded to the second semiconductor substrate by bonding the first bonding structure and the second bonding structure. The first pad is bonded to the second pad, and an extension direction of the first pad is different from an extension direction of the second pad.
    Type: Application
    Filed: July 28, 2021
    Publication date: December 29, 2022
    Applicant: United Microelectronics Corp.
    Inventors: Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin
  • Publication number: 20220016615
    Abstract: A proton-conductive membrane includes a hydrophobic organic polymer and a hydrophilic proton-conductive component. The hydrophilic proton-conductive component includes one of an urea-containing material and a complex formed from an acidic substance and a basic substance, and a combination thereof. The hydrophilic proton-conductive component is present in an amount ranging from 23 parts by weight to 70 parts by weight based on 100 parts by weight of the proton-conductive membrane.
    Type: Application
    Filed: May 19, 2021
    Publication date: January 20, 2022
    Inventors: Chun-Ting Yeh, Sih-Ci Jheng, Bo-Hung Lai
  • Publication number: 20220005775
    Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.
    Type: Application
    Filed: August 4, 2020
    Publication date: January 6, 2022
    Applicant: United Microelectronics Corp.
    Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
  • Patent number: 11164822
    Abstract: A structure of semiconductor device is provided. The structure includes a first bonding pattern, formed on a first substrate. A first grating pattern is disposed on the first substrate, having a plurality of first bars extending along a first direction. A second bonding pattern is formed on a second substrate. A second grating pattern, disposed on the second substrate, having a plurality of second bars extending along the first direction. The first bonding pattern is bonded to the second bonding pattern. One of the first grating pattern and the second grating pattern is stacked over and overlapping at the first direction with another one of the first grating pattern and the second grating pattern. A first gap between adjacent two of the first bars is different from a second gap between adjacent two of the second bars.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: November 2, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Hui-Ling Chen, Chien-Ming Lai
  • Publication number: 20200180283
    Abstract: The invention provides a flexible sealing film. The flexible sealing film includes a polymer layer and a thermosetting resin layer. The thermosetting layer is arranged on a surface of the polymer layer, and includes: (a) 100 parts by weight of epoxy resin, (b) 50 parts by weight to 100 parts by weight of a phosphorous flame retardant, (c) 20 parts by weight to 50 parts by weight of a toughening agent, (d) 0.1 parts by weight to 2.0 parts by weight of a phosphine compound, (e) 2 parts by weight to 12 parts by weight of silicon dioxide, and (f) 1 part by weight to 10 parts by weight of an ion exchanger. The invention further provides a flexible sealing film and a flexible sealing structure.
    Type: Application
    Filed: November 28, 2019
    Publication date: June 11, 2020
    Applicant: Microcosm Technology Co., Ltd.
    Inventors: Chun-Ting Yeh, Sih-Ci Jheng
  • Publication number: 20200185731
    Abstract: A flexible sealing structure is provided. The flexible sealing structure includes a flexible sealing member and a membrane electrode assembly. The flexible sealing member includes a first flexible sealing film and a second flexible sealing film, and a hollow region is formed in a center of the flexible sealing member. The membrane electrode assembly is located between the first flexible sealing film and the second flexible sealing film. A side surface of the membrane electrode assembly is even. The membrane electrode assembly has a first surface and a second surface. The hollow region of the flexible sealing member exposes a portion of the first surface and a portion of the second surface of the membrane electrode assembly.
    Type: Application
    Filed: November 28, 2019
    Publication date: June 11, 2020
    Applicant: Microcosm Technology Co., Ltd.
    Inventors: Chun-Ting Yeh, Sih-Ci Jheng
  • Patent number: 10192808
    Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: January 29, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Teng-Chuan Hu, Chun-Hung Chen, Chu-Fu Lin, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin
  • Publication number: 20190013259
    Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.
    Type: Application
    Filed: July 6, 2017
    Publication date: January 10, 2019
    Inventors: Teng-Chuan Hu, Chun-Hung Chen, Chu-Fu Lin, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin
  • Publication number: 20160322851
    Abstract: A wireless charging device includes a flexible carrier member, at least one thin-film transmitter coil assembly and a hanging element. The flexible carrier member includes a main carrier part and at least one sub-carrier part. The at least one sub-carrier part is connected with the main carrier part, so that at least one pocket is defined by the main carrier part and the at least one sub-carrier part collaboratively. Each pocket has an entrance and an accommodation space. The at least one thin-film transmitter coil assembly is disposed within the main carrier part, and emits an electromagnetic wave with at least one specified frequency for wirelessly charging at least one power-receiving device within the accommodation space of the pocket. The hanging element is connected with the main carrier part. The flexible carrier member is hung on an object through the hanging element.
    Type: Application
    Filed: September 22, 2015
    Publication date: November 3, 2016
    Inventors: Yu-Chou Yeh, Tsung-Her Yeh, Chen-Chi Wu, Chun-Ting Yeh, Hsueh-Jung Huang, Bo-Ruei Cheng, Chih-Ming Hu, Chiu-Cheng Tsui