Patents by Inventor Chun-Wei Chiu

Chun-Wei Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Publication number: 20240156410
    Abstract: Methods for determining a signal quality index for bioinformation measurement are disclosed herein. The method can include detecting a light intensity when the transmitter module is in an off state. The method can include comparing the light intensity to a first threshold. The method can include decreasing the gain of the receiver module when the light intensity is greater than the first threshold. The method can include comparing the light intensity to a second threshold when the light intensity is less than the first threshold. The method can include decreasing the gain of the receiver module when the light intensity is greater than the second threshold. The method can include comparing the light intensity to a third threshold when the light intensity is less than the second threshold. The method can include increasing the gain of the receiver module when the light intensity is less than the third threshold.
    Type: Application
    Filed: September 15, 2023
    Publication date: May 16, 2024
    Inventors: Kai-Wei Chiu, Chun-Wei Chang, Jui-Wei Tsai, Shih-Jie Wu
  • Publication number: 20240155807
    Abstract: A two-phase immersion-type heat dissipation structure having acute-angle notched structures is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins has first and second surfaces defined thereon and connected to each other. An angle between the first surface and the fin surface is from 80 degrees to 100 degrees, and an angle between the second surface and the fin surface is less than 75 degrees.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
  • Publication number: 20240155809
    Abstract: A two-phase immersion-type heat dissipation structure having fins for facilitating bubble generation is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the plurality of fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins and the fin surface have an included angle therebetween that is from 80 degrees to 100 degrees. A center line average roughness (Ra) of the side surface is less than 3 ?m, and a ten-point average roughness (Rz) of the side surface is not less than 12 ?m.
    Type: Application
    Filed: November 6, 2022
    Publication date: May 9, 2024
    Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
  • Publication number: 20240155808
    Abstract: A two-phase immersion-cooling heat-dissipation composite structure is provided. The heat-dissipation composite structure includes a heat dissipation base, a plurality of high-thermal-conductivity fins, and at least one high-porosity solid structure. The heat dissipation base has a first surface and a second surface that face away from each other. The second surface of the heat dissipation base is in contact with a heating element immersed in a two-phase coolant. The first surface of the heat dissipation base is connected to the high-thermal-conductivity fins. The at least one high-porosity solid structure is located at the first surface of the heat dissipation base, and is connected and alternately arranged between side walls of two adjacent ones of the high-thermal-conductivity fins. Each of the high-porosity solid structure includes a plurality of closed holes and a plurality of open holes.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
  • Publication number: 20240141505
    Abstract: A gas permeable metal with a porosity gradient and a method of manufacturing the same are provided. A second lamination layer and a third lamination layer are respectively connected to two opposite sides of a first lamination layer. A pore diameter of the first lamination layer is larger than that of the second lamination layer. Thereby while being applied to molds, a mold cavity is mounted in the second lamination layer with smaller pore diameter so that products formed have fine and smooth surfaces. The arrangement of the first lamination layer with larger pore diameter is used for effective escape of gas generated during product production process. According to production requirements for products, a pore diameter of the third lamination layer can be adjusted to be not larger than that of the first lamination layer. Thus mechanical strength and gas exhaust capacity can be balanced.
    Type: Application
    Filed: December 7, 2022
    Publication date: May 2, 2024
    Inventors: MENG-HSIU TSAI, CHUN-WEI CHIU
  • Publication number: 20240142181
    Abstract: A two-phase immersion-type heat dissipation structure having skived fin with high porosity is provided. The two-phase immersion-type heat dissipation structure having skived fin with high porosity includes a porous heat dissipation structure having a total porosity that is equal to or greater than 5%. The porous heat dissipation structure includes a porous substrate and a plurality of porous and skived fins. The porous substrate has a first surface and a second surface that face away from each other. The second surface of the porous substrate is configured to be in contact with a heating element that is immersed in a two-phase coolant. The plurality of porous and skived fins are integrally formed on the first surface of the porous substrate by skiving. A first porosity of the plurality of porous and skived fins is greater than a second porosity of the porous substrate.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
  • Patent number: 11973985
    Abstract: Various schemes pertaining to pre-encoding processing of a video stream with motion compensated temporal filtering (MCTF) are described. An apparatus determines a filtering interval for a received raw video stream having pictures in a temporal sequence. The apparatus selects from the pictures a plurality of target pictures based on the filtering interval, as well as a group of reference pictures for each target picture to perform pixel-based MCTF, which generates a corresponding filtered picture for each target picture. The apparatus subsequently transmits the filtered pictures as well as non-target pictures to an encoder for encoding the video stream. Subpictures of natural images and screen content images are separately processed by the apparatus.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: April 30, 2024
    Assignee: MediaTek Inc.
    Inventors: Chih-Yao Chiu, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20240128252
    Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: TZU-WEI CHIU, CHUN-WEI CHANG, SHANG-PIN CHEN, WEI-CHIH CHEN, CHE-YEN HUANG
  • Publication number: 20240120282
    Abstract: The present application discloses a semiconductor structure and methods for manufacturing semiconductor structures. The semiconductor structure includes a plurality of bottom dies and a top die stacked on the bottom dies. The bottom dies receive power supplies through tiny through silicon vias (TSVs) formed in backside substrates of the bottom dies, while the top die receives power supplies through dielectric vias (TDVs) formed in a dielectric layer that covers the bottom dies. By enabling backside power delivery to the bottom die, more space can be provided for trace routing between stacked dies. Therefore, greater computation capability can be achieved within a smaller chip area with less power loss.
    Type: Application
    Filed: February 20, 2023
    Publication date: April 11, 2024
    Inventors: TZU-WEI CHIU, CHUN-WEI CHANG, SHANG-PIN CHEN, WEI-CHIH CHEN, CHE-YEN HUANG
  • Publication number: 20240096701
    Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.
    Type: Application
    Filed: May 17, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Ching-Wei TSAI, Shang-Wen CHANG, Yi-Hsun CHIU, Chih-Hao WANG
  • Publication number: 20230056090
    Abstract: A method of labeling video to provide authentication acquires an instruction to apply timestamp labeling. Each recorded video is labeled with a timestamp based on the instruction. The first mark information is generated based on a content of each recorded video as a hash value and is uploaded into a blockchain. Second mark information is generated based on a content of at least one video under investigation. By comparing the first mark information and the second mark information, a video under investigation is found to be undistorted and authentic when the first mark information is the same as the second mark information. The video under investigation is found to be non-authentic when the first mark information is different from the second mark information. A terminal device and a computer readable storage medium applying the method are also disclosed.
    Type: Application
    Filed: May 19, 2022
    Publication date: February 23, 2023
    Inventor: CHUN-WEI CHIU
  • Patent number: 11379206
    Abstract: Discloses are an APP pushing method and a computer-readable storage medium. Information of address book of each of a plurality of user terminals installed with a preset APP is obtained. All identical communication numbers present in detected address books of the plurality of user terminals are obtained. An intimacy set between a friend user corresponding to each identical communication number and terminal users corresponding to the plurality of user terminals is obtained according to interaction data between the friend user and the terminal users. At least one intimacy set with a number of close relationships matching a predetermined relationship being greater than a threshold is extracted from all intimacy sets. At least one of the preset APP and related information of the preset APP is pushed to the corresponding user terminal of the friend user corresponding to each intimacy set in the extracted at least one intimacy set.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: July 5, 2022
    Assignee: SUZHOU DAJIAYING INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Chun-wei Chiu
  • Patent number: 11321258
    Abstract: An integrated circuit includes a specific pin, an output circuit, a voltage detector, and a controller. The output circuit is coupled to the specific pin. The voltage detector obtains a detection voltage value from the specific pin. In response to an alert request, the controller provides a control signal to the output circuit based on the detection voltage value, so as to selectively control the output circuit to transmit the alert signal to the specific pin. When the control signal instructs the integrated circuit to operate in a blocking mode, the output circuit blocks the alert signal from being transmitted to the specific pin. When the control signal instructs the integrated circuit to operate in a transmission mode, the output circuit transmits the alert signal to the specific pin.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: May 3, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Kang-Fu Chiu, Chih-Hung Huang, Chun-Wei Chiu, Hao-Yang Chang
  • Publication number: 20220020088
    Abstract: A method for assigning virtual object in a block chain system obtains an amount of virtual currency owned by each block chain account, and assigns a number of electronic vouchers to each block chain account based on the amount of virtual currency owned by each block chain account. Special electronic vouchers with authority of reward distribution according to a predetermined extraction rule are determined, and virtual currency is assigned to each block chain account based on the number of special electronic vouchers owned by each block chain account. A device for assigning virtual object is also provided.
    Type: Application
    Filed: July 12, 2021
    Publication date: January 20, 2022
    Inventor: Chun-Wei CHIU
  • Patent number: 11216049
    Abstract: A bus system is provided. The bus system includes a master device and a plurality of slave devices electrically connected to the master device. Each slave device has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert handshake control line. When the alert handshake control line is at a first voltage level and a first slave device want to communicate with the master device, the first slave device controls the alert handshake control line to a second voltage level via the alert handshake pin, such that the slave devices enter a synchronization stage. Among phases of each assignment period, in a first phase corresponding to the first slave device, the first slave device controls the alert handshake control line to the second voltage level via the alert handshake pin.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: January 4, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chih-Hung Huang, Chun-Wei Chiu, Hao-Yang Chang
  • Publication number: 20210182043
    Abstract: Discloses are an APP pushing method and a computer-readable storage medium. Information of address book of each of a plurality of user terminals installed with a preset APP is obtained. All identical communication numbers present in detected address books of the plurality of user terminals are obtained. An intimacy set between a friend user corresponding to each identical communication number and terminal users corresponding to the plurality of user terminals is obtained according to interaction data between the friend user and the terminal users. At least one intimacy set with a number of close relationships matching a predetermined relationship being greater than a threshold is extracted from all intimacy sets. At least one of the preset APP and related information of the preset APP is pushed to the corresponding user terminal of the friend user corresponding to each intimacy set in the extracted at least one intimacy set.
    Type: Application
    Filed: November 6, 2018
    Publication date: June 17, 2021
    Inventor: Chun-wei CHIU
  • Publication number: 20210081341
    Abstract: An integrated circuit includes a specific pin, an output circuit, a voltage detector, and a controller. The output circuit is coupled to the specific pin. The voltage detector obtains a detection voltage value from the specific pin. In response to an alert request, the controller provides a control signal to the output circuit based on the detection voltage value, so as to selectively control the output circuit to transmit the alert signal to the specific pin. When the control signal instructs the integrated circuit to operate in a blocking mode, the output circuit blocks the alert signal from being transmitted to the specific pin. When the control signal instructs the integrated circuit to operate in a transmission mode, the output circuit transmits the alert signal to the specific pin.
    Type: Application
    Filed: September 2, 2020
    Publication date: March 18, 2021
    Inventors: Kang-Fu CHIU, Chih-Hung HUANG, Chun-Wei CHIU, Hao-Yang CHANG
  • Patent number: 10936524
    Abstract: A bus system is provided. The bus system includes a master device, a bus, and a plurality of slave devices electrically connected to the master device via the bus. Each slave device has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert-handshake control line. When a first slave device communicates with the master device through the bus, in a first phase of a plurality of phases in each assignment period, the first slave device sets the alert-handshake control line to a first voltage level via the alert handshake pin, wherein the first phase corresponds to the first slave device. In the phases other than the first phase in each assignment period, the alert-handshake control line is at a second voltage level. Each of the phases includes two clock cycles.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 2, 2021
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chih-Hung Huang, Chun-Wei Chiu, Hao-Yang Chang
  • Patent number: D927071
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: August 3, 2021
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Chun-Wei Chiu, Teh-Long Lai, Shyh-Chi Wu