Patents by Inventor Chunwei Hsu

Chunwei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuits and methods for a combined phase detector
    Patent number: 9197224
    Abstract: Circuits and methods for a combined phase detector are provided. In some embodiments, circuits for a combined phase detector are provided, the circuits comprising: a tri-state phase frequency detector and charge pump that receives a reference signal and a first input signal, and that produces a first output signal; and a sub-sampling phase detector that receives the reference signal and a second input signal, and that outputs a second output signal, wherein the first output signal and the second output signal are coupled together.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: November 24, 2015
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Peter R. Kinget, Chunwei Hsu, Shih-An Yu, Karthik Tripurari
  • Circuits and Methods for a Combined Phase Detector
    Publication number: 20130156076
    Abstract: Circuits and methods for a combined phase detector are provided. In some embodiments, circuits for a combined phase detector are provided, the circuits comprising: a tri-state phase frequency detector and charge pump that receives a reference signal and a first input signal, and that produces a first output signal; and a sub-sampling phase detector that receives the reference signal and a second input signal, and that outputs a second output signal, wherein the first output signal and the second output signal are coupled together.
    Type: Application
    Filed: July 13, 2012
    Publication date: June 20, 2013
    Inventors: Peter R. Kinget, Chunwei Hsu, Shih-An Yu, Karthik Tripurari
  • Circuit for DC offset cancellation
    Patent number: 7355471
    Abstract: A circuit having multiple overlapped feedback loops for DC offset cancellation is provided with applying in one of multistage amplifier, multistage filter, and the combination thereof. The circuit includes a plurality of negative feedback variable bandwidth switches coupled to each stage of the above mentioned multistage devices, the output of the last stage is coupled to an input of a low-pass filter loop. The circuit includes a plurality of variable gain amplifiers, output of each variable gain amplifier is coupled to the series contact of each stage respectively, and input of each variable gain amplifier is thereof coupled to an output of the low-pass filter loop. Therefore, the circuit achieves to cancel the DC offset for multistage overlapped feedback path with less area and low power consumption.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: April 8, 2008
    Assignee: Via Technologies Inc.
    Inventors: Kuan Da Chen, Chunwei Hsu
  • Circuit for DC offset cancellation
    Publication number: 20060279344
    Abstract: A circuit having multiple overlapped feedback loops for DC offset cancellation is provided with applying in one of multistage amplifier, multistage filter, and the combination thereof. The circuit includes a plurality of negative feedback variable bandwidth switches coupled to each stage of the above mentioned multistage devices, the output of the last stage is coupled to an input of a low-pass filter loop. The circuit includes a plurality of variable gain amplifiers, output of each variable gain amplifier is coupled to the series contact of each stage respectively, and input of each variable gain amplifier is thereof coupled to an output of the low-pass filter loop. Therefore, the circuit achieves to cancel the DC offset for multistage overlapped feedback path with less area and low power consumption.
    Type: Application
    Filed: June 9, 2006
    Publication date: December 14, 2006
    Inventors: Kuan Chen, Chunwei Hsu