Patents by Inventor Chun-Yang Hu
Chun-Yang Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11960761Abstract: A memory control method is disclosed according to an embodiment. The method includes: temporarily storing first type data into a buffer memory, wherein the first type data is preset to be stored into a rewritable non-volatile memory module based on a first programming mode; in a state that the first type data is stored in the buffer memory, temporarily storing second type data into the buffer memory, and the second type data is preset to be stored into the rewritable non-volatile memory module based on a second programming mode different from the first programming mode; and in a state that a data volume of the first type data in the buffer memory does not reach a first threshold, if a data volume of the second type data in the buffer memory reaches a second threshold, storing the first type data in the buffer memory into the rewritable non-volatile memory module.Type: GrantFiled: December 11, 2020Date of Patent: April 16, 2024Assignee: PHISON ELECTRONICS CORP.Inventors: Chun-Yang Hu, Yi-Tein Hung
-
Publication number: 20240072115Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.Type: ApplicationFiled: February 13, 2023Publication date: February 29, 2024Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
-
Publication number: 20220164133Abstract: A memory control method is disclosed according to an embodiment. The method includes: temporarily storing first type data into a buffer memory, wherein the first type data is preset to be stored into a rewritable non-volatile memory module based on a first programming mode; in a state that the first type data is stored in the buffer memory, temporarily storing second type data into the buffer memory, and the second type data is preset to be stored into the rewritable non-volatile memory module based on a second programming mode different from the first programming mode; and in a state that a data volume of the first type data in the buffer memory does not reach a first threshold, if a data volume of the second type data in the buffer memory reaches a second threshold, storing the first type data in the buffer memory into the rewritable non-volatile memory module.Type: ApplicationFiled: December 11, 2020Publication date: May 26, 2022Applicant: PHISON ELECTRONICS CORP.Inventors: Chun-Yang Hu, Yi-Tein Hung
-
Patent number: 11216217Abstract: A data transfer method includes: instructing a first memory storage device to disable a data encryption function activated by default; and sending a write command to the first memory storage device under a status that the data encryption function of the first memory storage device is disabled. The write command instructs a storing of encryption information of encrypted data to the first memory storage device. The encryption information is not generated by the first memory storage device and is unreadable by a normal read command.Type: GrantFiled: April 14, 2020Date of Patent: January 4, 2022Assignee: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Publication number: 20210294523Abstract: A data transfer method is disclosed, and includes: instructing a first memory storage device to disable a data encryption function activated by default; and sending a write command to the first memory storage device under a status that the data encryption function of the first memory storage device is disabled. The write command instructs a storing of encryption information of encrypted data to the first memory storage device. The encryption information is not generated by the first memory storage device and is unreadable by a normal read command.Type: ApplicationFiled: April 14, 2020Publication date: September 23, 2021Applicant: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Patent number: 10719259Abstract: A memory management method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The memory management method includes: recording sorting information corresponding to a plurality of first physical units of the rewritable non-volatile memory module according to a data storage status of the first physical units; receiving at least one command, and the command is configured to change the data storage status of the first physical units; updating the sorting information according to the command; and copying data stored in at least one physical unit among the first physical units to at least one second physical unit of the rewritable non-volatile memory module according to the updated sorting information.Type: GrantFiled: March 30, 2018Date of Patent: July 21, 2020Assignee: PHISON ELECTRONICS CORP.Inventors: Chun-Yang Hu, Cheng-Yi Lin, Bo-Cheng Ko
-
Patent number: 10490283Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes: performing a single-layer erasing operation on one of physical erasing units; performing a multi-layer erasing operation on another one of the physical erasing units; and performing a wear leveling operation based on the one and the another one of the physical erasing units, wherein the another one of the physical erasing units is performed the wear leveling operation first than the one of the physical erasing units.Type: GrantFiled: December 4, 2017Date of Patent: November 26, 2019Assignee: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Publication number: 20190227731Abstract: A memory management method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The memory management method includes: recording sorting information corresponding to a plurality of first physical units of the rewritable non-volatile memory module according to a data storage status of the first physical units; receiving at least one command, and the command is configured to change the data storage status of the first physical units; updating the sorting information according to the command; and copying data stored in at least one physical unit among the first physical units to at least one second physical unit of the rewritable non-volatile memory module according to the updated sorting information.Type: ApplicationFiled: March 30, 2018Publication date: July 25, 2019Applicant: PHISON ELECTRONICS CORP.Inventors: Chun-Yang Hu, Cheng-Yi Lin, Bo-Cheng Ko
-
Patent number: 10289546Abstract: A memory management method for a rewritable non-volatile memory module having a plurality of physical erasing units is provided. The method includes providing a sequence corresponding to at least part of the physical erasing units; adjusting the sequence by arranging a first physical erasing unit to a first end of the sequence based on an updating time corresponding to the first physical erasing unit; searching the at least part of the physical erasing units based on a searching order for finding at least one second physical erasing unit that meets a data condition, and the searching order indicates an order from a second end of the sequence to the first end of the sequence; and moving valid data stored in the at least one second physical erasing unit. Accordingly, efficiency of the garbage collection operation can be improved.Type: GrantFiled: June 2, 2017Date of Patent: May 14, 2019Assignee: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Publication number: 20190103163Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes: performing a single-layer erasing operation on one of physical erasing units; performing a multi-layer erasing operation on another one of the physical erasing units; and performing a wear leveling operation based on the one and the another one of the physical erasing units, wherein the another one of the physical erasing units is performed the wear leveling operation first than the one of the physical erasing units.Type: ApplicationFiled: December 4, 2017Publication date: April 4, 2019Applicant: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Publication number: 20180300235Abstract: A memory management method for a rewritable non-volatile memory module having a plurality of physical erasing units is provided. The method includes providing a sequence corresponding to at least part of the physical erasing units; adjusting the sequence by arranging a first physical erasing unit to a first end of the sequence based on an updating time corresponding to the first physical erasing unit; searching the at least part of the physical erasing units based on a searching order for finding at least one second physical erasing unit that meets a data condition, and the searching order indicates an order from a second end of the sequence to the first end of the sequence; and moving valid data stored in the at least one second physical erasing unit. Accordingly, efficiency of the garbage collection operation can be improved.Type: ApplicationFiled: June 2, 2017Publication date: October 18, 2018Applicant: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Patent number: 10025708Abstract: A memory management method, and a memory control circuit unit and a memory storage apparatus using this method are provided. The method includes performing a first garbage collection operation corresponding to a data area if the number of physical erasing units associated with the data area is larger than a first threshold; performing a second garbage collection operation corresponding to a table area if the number of physical erasing units associated with the table area is larger than a second threshold; and dynamically adjusting the second threshold according to the number of the physical erasing units associated with the data area.Type: GrantFiled: November 7, 2017Date of Patent: July 17, 2018Assignee: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Patent number: 9947412Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes recording a plurality of characteristic parameters corresponding to a plurality of data to be programmed; arranging the data according to the characteristic parameters and identifying frequently-read data among the plurality of data according to the characteristic parameters, and programming the frequently-read data into a first physical programming unit of a rewritable non-volatile memory module, wherein a time for reading data from the first physical programming unit is less than a time for reading data from a second physical programming unit of the rewritable non-volatile memory module. Accordingly, the reading performance for the data can be effectively improved.Type: GrantFiled: May 23, 2017Date of Patent: April 17, 2018Assignee: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Patent number: 9940021Abstract: A method and a system for memory management and a memory storage device thereof are provided. The memory storage device includes a rewritable non-volatile memory module. The method includes receiving a command from a host system; reading use information from the rewritable non-volatile memory module according to the command; writing the use information into a first physical erasing unit of the rewritable non-volatile memory module, and marking the first physical erasing unit with a recognizing flag. The method also includes erasing data in at least part of physical erasing units excepting the first physical erasing unit in the rewritable non-volatile memory module according to the recognizing flag; and establishing a memory management table according to the use information stored in the first physical erasing unit for operating the memory storage device.Type: GrantFiled: January 18, 2016Date of Patent: April 10, 2018Assignee: PHISON ELECTRONICS CORP.Inventor: Chun-Yang Hu
-
Publication number: 20170147216Abstract: A method and a system for memory management and a memory storage device thereof are provided. The memory storage device includes a rewritable non-volatile memory module. The method includes receiving a command from a host system; reading use information from the rewritable non-volatile memory module according to the command; writing the use information into a first physical erasing unit of the rewritable non-volatile memory module, and marking the first physical erasing unit with a recognizing flag. The method also includes erasing data in at least part of physical erasing units excepting the first physical erasing unit in the rewritable non-volatile memory module according to the recognizing flag; and establishing a memory management table according to the use information stored in the first physical erasing unit for operating the memory storage device.Type: ApplicationFiled: January 18, 2016Publication date: May 25, 2017Inventor: Chun-Yang Hu