Patents by Inventor Chun-Yen Tai

Chun-Yen Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088236
    Abstract: In a method of manufacturing a semiconductor device, underlying structures comprising gate electrodes and source/drain epitaxial layers are formed, one or more layers are formed over the underlying structures, a hard mask layer is formed over the one or more layers, one or more first resist layers are formed over the hard mask layer, a first photo resist pattern is formed over the one or more first resist layers, a width of the first photo resist pattern is adjusted, the one or more first resist layers are patterned by using the first photo resist pattern as an etching mask, thereby forming a first hard mask pattern, and the hard mask layer is patterned by using the first hard mask pattern, thereby forming a second hard mask pattern.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Wen HSIAO, Chun-Yen TAI, Yen-Hsin LIU, Ming-Jhih KUO, Ming-Feng SHIEH
  • Publication number: 20240071981
    Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Patent number: 11862690
    Abstract: In a method of manufacturing a semiconductor device, underlying structures comprising gate electrodes and source/drain epitaxial layers are formed, one or more layers are formed over the underlying structures, a hard mask layer is formed over the one or more layers, one or more first resist layers are formed over the hard mask layer, a first photo resist pattern is formed over the one or more first resist layers, a width of the first photo resist pattern is adjusted, the one or more first resist layers are patterned by using the first photo resist pattern as an etching mask, thereby forming a first hard mask pattern, and the hard mask layer is patterned by using the first hard mask pattern, thereby forming a second hard mask pattern.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Wen Hsiao, Chun-Yen Tai, Yen-Hsin Liu, Ming-Jhih Kuo, Ming-Feng Shieh
  • Publication number: 20230005737
    Abstract: A method of manufacturing a semiconductor device includes depositing a photoresist material over a substrate. The substrate is rotated to spread the photoresist material. A gas is blown to an edge of the substrate when rotating the substrate. The rotating of the substrate is stopped. The blowing of the gas is stopped.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Hsin LIU, Ming-Jhih KUO, Chun-Yen TAI
  • Publication number: 20220344478
    Abstract: In a method of manufacturing a semiconductor device, underlying structures comprising gate electrodes and source/drain epitaxial layers are formed, one or more layers are formed over the underlying structures, a hard mask layer is formed over the one or more layers, one or more first resist layers are formed over the hard mask layer, a first photo resist pattern is formed over the one or more first resist layers, a width of the first photo resist pattern is adjusted, the one or more first resist layers are patterned by using the first photo resist pattern as an etching mask, thereby forming a first hard mask pattern, and the hard mask layer is patterned by using the first hard mask pattern, thereby forming a second hard mask pattern.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 27, 2022
    Inventors: Ming-Wen HSIAO, Chun-Yen TAI, Yen-Hsin LIU, Ming-Jhih KUO, Ming-Feng SHIEH
  • Patent number: 10562027
    Abstract: An electrochemical extended-gate transistor (EET) system is provided, the system includes: a field effect transistor (FET), having a gate, a source, and a drain; a potentiostat, having a working electrode, a counter electrode, and a reference electrode; wherein the working electrode is coupled with a detection region, and the counter electrode is coupled with the gate; wherein the detection region, the gate, and the reference electrode are arranged in an ion fluid; wherein the potentiostat is configured to generate redox in the ion fluid by an electrochemical method to detect the target. A method for detecting targets are used to such system.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: February 18, 2020
    Assignee: Winnoz Technology, Inc.
    Inventors: Le-Chang Hsiung, Chun-Yen Tai, Yu-Lin Chen, Fang-Yu Lin, Chuan Whatt Eric Ou
  • Publication number: 20160320332
    Abstract: An electrochemical extended-gate transistor (EET) system is provided, the system includes: a field effect transistor (FET), having a gate, a source, and a drain; a potentiostat, having a working electrode, a counter electrode, and a reference electrode; wherein the working electrode is coupled with a detection region, and the counter electrode is coupled with the gate; wherein the detection region, the gate, and the reference electrode are arranged in an ion fluid; wherein the potentiostat is configured to generate redox in the ion fluid by an electrochemical method to detect the target. A method for detecting targets are used to such system.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 3, 2016
    Inventors: Le-Chang Hsiung, Chun-Yen Tai, Yu-Lin Chen, Fang-Yu Lin, Chuan Whatt Eric Ou