Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first pixel region and a second pixel region within a substrate. A first recess region is disposed along a back-side of the substrate within the first pixel region. The back-side of the substrate within the first pixel region is asymmetric about a center of the first pixel region in a cross-sectional view. A second recess region is disposed along the back-side of the substrate and within the second pixel region. The back-side of the substrate within the second pixel region is asymmetric about a center of the second pixel region in the cross-sectional view. The first recess region and the second recess region are substantially symmetric about a vertical line laterally between the first pixel region and the second pixel region.

Abstract: A deflecting plate includes a silicon-on-insulator (SOI) substrate. The SOI substrate includes: an insulator layer having a top surface and a bottom surface; a device layer coupled to the insulator layer at the top surface, wherein multiple deflecting apertures are disposed in the device layer, each of which extending from a top open end to a bottom open end through the device layer, and wherein the bottom open end is coplanar with the top surface of the insulator layer; and a handle substrate coupled to the insulator layer at the bottom surface, wherein a cavity is disposed in the handle substrate and extends from a cavity open end to a cavity bottom wall, and wherein the bottom wall is coplanar with the top surface of the insulator layer, such that the bottom open end of each deflecting aperture is exposed to the cavity.

Abstract: Various embodiments of the present disclosure are directed towards an imaging device including a first image sensor element and a second image sensor element respectively comprising a pixel unit disposed within a semiconductor substrate. The first image sensor element is adjacent to the second image sensor element. A first micro-lens overlies the first image sensor element and is laterally shifted from a center of the pixel unit of the first image sensor element by a first lens shift amount. A second micro-lens overlies the second image sensor element and is laterally shifted from a center of the pixel unit of the second image sensor element by a second lens shift amount different from the first lens shift amount.

Abstract: A memory circuit includes a non-volatile memory cell, a comparator and a detection circuit. The comparator is coupled to the non-volatile memory cell, and configured to generate a first output signal. The comparator including a first input terminal and a first output terminal. The first input terminal is coupled to the non-volatile memory cell by a first node, and configured to receive a first voltage. The first output terminal is configured to output the first output signal. The detection circuit is coupled to the comparator and the non-volatile memory cell. The detection circuit is configured to latch the first output signal and disrupt a current path between at least the non-volatile memory cell and the comparator. The detection circuit includes a first inverter coupled to the first output terminal of the comparator and configured to generate an inverted first output signal.

Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first photodetector disposed in a first pixel region of a semiconductor substrate and a second photodetector disposed in a second pixel region of the semiconductor substrate. The second photodetector is laterally separated from the first photodetector. A first diffuser is disposed along a back-side of the semiconductor substrate and over the first photodetector. A second diffuser is disposed along the back-side of the semiconductor substrate and over the second photodetector. A first midline of the first pixel region and a second midline of the second pixel region are both disposed laterally between the first diffuser and the second diffuser.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.

Abstract: A nasal filter includes a main body, a cover, and a filtering medium. The main body has a hollow cylinder, a boss connected to a spherical member, a flange, and a plurality of internal guide vanes. The hollow cylinder has a front and a rear opening. A first threaded portion is formed on the outer surface at the front end portion of the hollow cylinder. A thru hole is formed on the cover and aligns correspondingly to the front opening of the hollow cylinder. A second threaded portion is formed on the inner surface of the cover for mating to the first threaded portion on the hollow cylinder. The filtering medium is held in between the cover and the hollow cylinder and covers the thru hole. A filter pad is further included to provide additional functions. Accordingly, the nasal filter offers air purification and doe not cover the mouth.

Abstract: A high voltage metal-oxide-semiconductor (HVMOS) transistor includes a gate poly, wherein a channel is formed in an area projected from the gate poly in a thickness direction when the HVMOS is activated; two carrier drain drift regions, adjacent to the area projected from the gate poly, wherein at least one of the carrier drain drift regions has a gradient doping concentration; and two carrier plus regions, respectively locate within the two carrier drain drift regions, wherein the two carrier plus regions and the two carrier drain drift regions are communicating with each other through the channel when the HVMOS is activated.

Abstract: A nasal filter includes a main body, a cover, and a filtering medium. The main body has a hollow cylinder, a boss connected to a spherical member, a flange, and a plurality of internal guide vanes. The hollow cylinder has a front and a rear opening. A first threaded portion is formed on the outer surface at the front end portion of the hollow cylinder. A thru hole is formed on the cover and aligns correspondingly to the front opening of the hollow cylinder. A second threaded portion is formed on the inner surface of the cover for mating to the first threaded portion on the hollow cylinder. The filtering medium is held in between the cover and the hollow cylinder and covers the thru hole. A filter pad is further included to provide additional functions. Accordingly, the nasal filter offers air purification and doe not cover the mouth.

Abstract: A high voltage metal-oxide-semiconductor (HVMOS) transistor includes a gate poly, wherein a channel is formed in an area projected from the gate poly in a thickness direction when the HVMOS is activated; two carrier drain drift regions, adjacent to the area projected from the gate poly, wherein at least one of the carrier drain drift regions has a gradient doping concentration; and two carrier plus regions, respectively locate within the two carrier drain drift regions, wherein the two carrier plus regions and the two carrier drain drift regions are communicating with each other through the channel when the HVMOS is activated.

Abstract: A method of fabricating a semiconductor device is provided. The method comprises: forming a first layer; forming a P-well on the first layer; forming an isolation region in the P-well; performing an extra implantation on a surface between the P-well and the first layer; and forming a source/drain region. The method of the present invention can solve the punch through problem of the conventional iso-NMOS transistor without increasing cost.

Abstract: A pin leading device (1) comprises a hollow plate holder (8) having a hollow frame (9) and a hollow cylinder (10) disposed on the hollow frame (9), a threaded hole (101) formed in the hollow cylinder (10), a sleeve (2) having a recess hole (21) and a threaded end (20) engaging with the threaded hole (101), an elastic spring (3) inserted in an upper portion of the sleeve (2), a rod (4) inserted in the recess hole (21) and surrounded by the elastic spring (3), and a press head (5) disposed on an upper end of the rod (4). The hollow frame (9) has two opposite lateral plates (90) defining a spacing on a bottom of the hollow frame (9). A pin leading plate (6) is disposed on the bottom of the hollow frame (9). The pin leading plate (6) has a center hole (60) and two serrated lateral sides (7). The spacings between the lateral plates (90) of the hollow frame (9) and the lateral sides (7) of the leading plate (6) receive two rows of pins of an integrated circuit component.

Abstract: An IC hand tool is composed of a base, a main body, a press rod, and two holding arms. The base is provided with a receiving space for locating an IC element. The main body is fastened at one end thereof with the base and provided with an axial through hole in which the press rod is located such that a cap of the press rod is located outside the top end of the main body and that a leg block of the press rod is located in the receiving space of the base. The main body is further provided with two protruded portions and a plurality of fastening lugs for fastening the holding arms pivotally. The holding arms are provided respectively at the bottom end thereof with a hooked body for holding securely the IC element which is located in the receiving space of the base. The IC element is handled by mainpulating the press rod with hand of an operator.