Patents by Inventor Chune Lee

Chune Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5387495
    Abstract: A method of forming a multilayer circuit board is disclosed which includes a build-up process in which, beginning with a solidified layer of the dielectric disposed upon a substrate, alternate layers of conducting metal and dielectric are sequentially deposited. Each layer of conducting metal lines is defined using photoresist and a photolithographic technique. After the lines are deposited, the photoresist is removed and a second layer of photoresist defines the conductive posts which function as through holes between metal layers. After each layer of conductive line and posts is formed, and the photoresist is removed, the dielectric is flowed into place and solidified to insulate adjacent metal lines and posts. The process may be repeated as many times as necessary to build up layers of conducting metal and dielectric, and form the completed multilayer wiring board.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: February 7, 1995
    Assignee: Digital Equipment Corporation
    Inventors: James C. K. Lee, Arshad Ahmad, Chune Lee, Myrna E. Castro, Francisca Tung
  • Patent number: 5014161
    Abstract: A semiconductor mounting system is provided for the detachable surface mounting of one or more semiconductor dies on a conductor substrate, such as a ceramic substrate or printed circuit board. The system employs a resilient, anisotropic conductor pad which is interposed between the semiconductor die and the conductor substrate. The conductor pad is capable of conducting electric signals in one direction only, and insulates in the other two orthogonal directions. Thus, by compressing the semiconductor die and resilient conductor pad against the conductor substrate, electrical contact is established between contacts on the semiconductor die and corresponding contacts on the conductor substrate. In the preferred embodiment, additional conductor pads are placed over the semiconductor dies, and a heat sink placed over the second conductor pads.
    Type: Grant
    Filed: February 7, 1990
    Date of Patent: May 7, 1991
    Assignee: Digital Equipment Corporation
    Inventors: James C. K. Lee, Gene M. Amdahl, Richard Beck, Chune Lee, Edward Hu
  • Patent number: 4954873
    Abstract: An anisotropic elastomeric conductor is fabricated by stacking a plurality of first and second sheets, where the first sheets include a plurality of parallel electrically conductive fibers and the second sheets are composed of electrically insulating material. By introducing a curable elastomeric resin into the layered structure of sheets, and then curing the resin, a solid elastomeric block having a plurality of parallel electrically conductive fibers running its length is obtained. Individual elastomeric conductors suitable for interfacing between electronic components are obtained by slicing the block in a direction perpendicular to the conductors. The conductor slices so obtained are particularly suitable for interfacing between electronic devices having planar arrays of electrical contact pads.
    Type: Grant
    Filed: January 25, 1988
    Date of Patent: September 4, 1990
    Assignee: Digital Equipment Corporation
    Inventors: James Lee, Richard Beck, Chune Lee, Edward Hu
  • Patent number: 4809962
    Abstract: A vise includes: a vise body, a stationary vise jaw secured to the vise body, a movable vise jaw operatively moving in cooperation with the stationary vise jaw as driven by a screw, a pair of half nut portions formed on a pair of shear-like clamping handles which are operatively closed to form a combined nut engageable with the screw by a clutch, or opened to disengage the two half nut portions from the screw for fast movement of the movable vise jaw for quickly clamping a work piece between the movable jaw and the stationary jaw.
    Type: Grant
    Filed: March 21, 1988
    Date of Patent: March 7, 1989
    Inventor: Fung-Chune Lee
  • Patent number: 4778950
    Abstract: Electronic assemblies are fabricated by stacking alternate connecting layers and component layers. The component layers may be virtually any rigid structure having contact regions formed on at least one face thereof. The connecting layers are formed from anisotropic elastomeric conductors which in turn are fabricated by stacking a plurality of conductive sheets and insulating sheets, where the conductive sheets have a plurality of parallel electrically conductive elements formed therein. By introducing a curable elastomeric resin into the stacked structure so formed, and then curing the elastomer, a solid elastomeric block having a plurality of parallel electrically conductive elements running its length is obtained. Individual elastomeric conductors suitable as connecting layers interfacing between adjacent component layers are obtained by slicing the block in a direction perpendicular to the conductors.
    Type: Grant
    Filed: April 17, 1986
    Date of Patent: October 18, 1988
    Assignee: Digital Equipment Corporation
    Inventors: James C. K. Lee, Richard Beck, Chune Lee, Edward Hu
  • Patent number: 4754546
    Abstract: An anisotropic elastomeric conductor is fabricated by stacking a plurality of metal sheets and elastomeric sheets, where the metal sheets have a plurality of parallel electrically conductive elements formed therein. By coating a curable elastomeric resin on the metal sheets, and then curing the resulting layered structure, a solid elastomeric block having a plurality of parallel electrically conductive elements running its length is obtained. Individual elastomeric conductors suitable for interfacing between electronic components are obtained by slicing the block in a direction perpendicular to the conductors. The conductor slices so obtained are particularly suitable for interfacing between electronic devices having planar arrays of electrical contact pads.
    Type: Grant
    Filed: March 18, 1986
    Date of Patent: July 5, 1988
    Assignee: Digital Equipment Corporation
    Inventors: James C. K. Lee, Richard Beck, Chune Lee, Edward Hu
  • Patent number: 4729166
    Abstract: An anisotropic elastomeric conductor is fabricated by stacking a plurality of first and second sheets, where the first sheets include a plurality of parallel electrically conductive fibers and the second sheets are composed of electrically insulating material. By introducing a curable elastomeric resin into the layered structure of sheets, and then curing the resin, a solid elastomeric block having a plurality of parallel electrically conductive fibers running its length is obtained. Individual elastomeric conductors suitable for interfacing between electronic components are obtained by slicing the block in a direction perpendicular to the conductors. The conductor slices so obtained are particularly suitable for interfacing between electronic devices having planar arrays of electrical contact pads.
    Type: Grant
    Filed: July 22, 1985
    Date of Patent: March 8, 1988
    Assignee: Digital Equipment Corporation
    Inventors: James Lee, Richard Beck, Chune Lee, Edward Hu
  • Patent number: 4577398
    Abstract: A method of attaching a semiconductor chip to a mounting surface is disclosed. A solder barrier is applied to the mounting surface, and a preform of solder is located within the solder barrier. The preform is heated and then cooled in a vacuum to preflow the solder and secure the solder to the mounting surface substantially without voids. The semiconductor chip is then placed over the preflowed solder, which is reheated and then recooled in a vacuum to secure the chip to the mounting surface.
    Type: Grant
    Filed: September 7, 1984
    Date of Patent: March 25, 1986
    Assignee: Trilogy Computer Development Partners, Ltd.
    Inventors: John W. Sliwa, Roy J. Burt, Chune Lee, John MacKay, Cindy A. Johnson