Patents by Inventor Chunfei Ye

Chunfei Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088069
    Abstract: Disclosed herein are integrated circuit (IC) supports with microstrips, and related embodiments. For example, an IC support may include a plurality of microstrips and a plurality of conductive segments. Individual ones of the conductive segments may be at least partially over at least two microstrips, a dielectric material may be between the plurality of microstrips and the plurality of conductive segments, and the conductive segments are included in a tape.
    Type: Application
    Filed: February 26, 2021
    Publication date: March 14, 2024
    Applicant: Intel Corporation
    Inventors: Wenzhi Wang, Xiaoning Ye, Yunhui Chu, Chunfei Ye, James A. McCall
  • Publication number: 20230214669
    Abstract: Decision feedback equalization (DFE) training time in a memory device is reduced through the use of a hybrid search to select values of tap coefficients for taps in the DFE. The hybrid search includes two searches. A first search is performed to identify initial values of tap coefficients, a second search uses the initial values of tap coefficients to find the final values of tap coefficients.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Wenzhi WANG, Yunhui CHU, James A. McCALL, Chunfei YE, Tonia M. ROSE, Caroline GRIMES
  • Publication number: 20210399764
    Abstract: An apparatus comprises a crosstalk cancelation circuit comprising a plurality of taps to output signals based on a signal transmitted via a first data line; and a summation circuit to combine a signal received by a second data line with the signals output by the plurality of taps to reduce near-end crosstalk present in the signal received by the second data line.
    Type: Application
    Filed: September 1, 2021
    Publication date: December 23, 2021
    Applicant: Intel Corporation
    Inventors: Jingbo Li, Beom-Taek Lee, Jong-Ru Guo, Yunhui Chu, Chunfei Ye, Kai Xiao
  • Patent number: 11194751
    Abstract: An apparatus, such as a re-driver, can include a receiver port coupled to a first link partner across a first link; a transmitter port coupled to a second link partner across a second link; and a power management (PM) controller implemented in hardware. The PM controller can detect a PM control signal, determine a PM state for the apparatus based on the PM control signal, and cause the apparatus to enter the PM state. The apparatus can transmit electrical signals to the second link partner based on the PM state. The PM management control signal can include a clock request, an electrical idle, a common mode voltage, or other electrical signal indicative of a PM link state change of a link partner coupled to the re-driver.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: December 7, 2021
    Assignee: Intel Corporation
    Inventors: Huimin Chen, Jingbo Li, Kai Xiao, Yong Yang, Chunfei Ye
  • Publication number: 20190340146
    Abstract: An apparatus, such as a re-driver, can include a receiver port coupled to a first link partner across a first link; a transmitter port coupled to a second link partner across a second link; and a power management (PM) controller implemented in hardware. The PM controller can detect a PM control signal, determine a PM state for the apparatus based on the PM control signal, and cause the apparatus to enter the PM state. The apparatus can transmit electrical signals to the second link partner based on the PM state. The PM management control signal can include a clock request, an electrical idle, a common mode voltage, or other electrical signal indicative of a PM link state change of a link partner coupled to the re-driver.
    Type: Application
    Filed: July 16, 2019
    Publication date: November 7, 2019
    Applicant: Intel Corporation
    Inventors: Huimin Chen, Jingbo Li, Kai Xiao, Yong Yang, Chunfei Ye
  • Patent number: 7649265
    Abstract: In some embodiments, a micro-via structure design for high performance integrated circuits is presented. In this regard, an integrated circuit chip package is introduced having a dielectric layer, a plated throughhole in the dielectric layer, and a micro-via coupled with the plated throughhole, wherein the micro-via forms a path around an axis. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: January 19, 2010
    Assignee: Intel Corporation
    Inventors: Chunfei Ye, Boping Wu
  • Publication number: 20080314620
    Abstract: According to embodiments, small holes or openings may be cut on or through the ground plane(s) adjacent to a selected trace line, so that C and L will be changed accordingly. Then phase velocity will also be changed. As a result, the flying time from one location or point to a different location or point of the transmission line will also be changed. This concept applies to a single trace. Similarly, this concept may be applied to one trace of a differential pair of traces (e.g., so that the two parts of the differential signal transmitted at one point in time at a location on the pair arrive at the same time at another location of the pair).
    Type: Application
    Filed: August 19, 2008
    Publication date: December 25, 2008
    Inventors: Chunfei Ye, Xiaoning Ye
  • Patent number: 7450396
    Abstract: According to embodiments, small holes or openings may be cut on or through the ground plane(s) adjacent to a selected trace line, so that C and L will be changed accordingly. Then phase velocity will also be changed. As a result, the flying time from one location or point to a different location or point of the transmission line will also be changed. This concept applies to a single trace. Similarly, this concept may be applied to one trace of a differential pair of traces (e.g., so that the two parts of the differential signal transmitted at one point in time at a location on the pair arrive at the same time at another location of the pair).
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: November 11, 2008
    Assignee: Intel Corporation
    Inventors: Chunfei Ye, Xiaoning Ye
  • Publication number: 20080080155
    Abstract: According to embodiments, small holes or openings may be cut on or through the ground plane(s) adjacent to a selected trace line, so that C and L will be changed accordingly. Then phase velocity will also be changed. As a result, the flying time from one location or point to a different location or point of the transmission line will also be changed. This concept applies to a single trace. Similarly, this concept may be applied to one trace of a differential pair of traces (e.g., so that the two parts of the differential signal transmitted at one point in time at a location on the pair arrive at the same time at another location of the pair).
    Type: Application
    Filed: September 28, 2006
    Publication date: April 3, 2008
    Inventors: Chunfei Ye, Xiaoning Ye
  • Publication number: 20080079139
    Abstract: In some embodiments, a micro-via structure design for high performance integrated circuits is presented. In this regard, an integrated circuit chip package is introduced having a dielectric layer, a plated throughhole in the dielectric layer, and a micro-via coupled with the plated throughhole, wherein the micro-via forms a path around an axis. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Chunfei Ye, Boping Wu
  • Patent number: 6982672
    Abstract: A multi-band antenna comprises a first conductive layer having one or more parasitic patches, a second conductive layer having a plurality of radiating patches, and a third conductive layer having a ground patch. The first, second and third conductive layers may be separated by first and second substrate layers. The second conductive layer may comprise a first radiating patch having dimensions selected to radiate signals within a first frequency spectrum and second radiating patches having dimensions selected to radiate signals within a second frequency spectrum. In wireless local area network (WLAN) embodiments, the first frequency spectrum may comprise a frequency band ranging from approximately 5.1 to 5.9 GHz, and the second frequency spectrum may comprise frequency bands ranging from approximately 2.4 to 2.5 GHz.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: January 3, 2006
    Assignee: Intel Corporation
    Inventors: Shengli Lin, Chunfei Ye, Nilesh N. Shah
  • Publication number: 20050195110
    Abstract: A multi-band antenna comprises a first conductive layer having one or more parasitic patches, a second conductive layer having a plurality of radiating patches, and a third conductive layer having a ground patch. The first, second and third conductive layers may be separated by first and second substrate layers. The second conductive layer may comprise a first radiating patch having dimensions selected to radiate signals within a first frequency spectrum and second radiating patches having dimensions selected to radiate signals within a second frequency spectrum. In wireless local area network (WLAN) embodiments, the first frequency spectrum may comprise a frequency band ranging from approximately 5.1 to 5.9 GHz, and the second frequency spectrum may comprise frequency bands ranging from approximately 2.4 to 2.5 GHz.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 8, 2005
    Inventors: Shengli Lin, Chunfei Ye, Nilesh Shah
  • Publication number: 20030184497
    Abstract: An antenna employs cylindrical Fresnel zone plate (CFZP) construction in combination with a reflective ground plate and a sectorial reflector to enhance antenna gain, while lowering assembly cost and improving antenna placement flexibility. By forming a surface of symmetry for the antenna, the ground plate allows the antenna to mimic the operation of a symmetrical CFZP antenna using only half the nominal number of Fresnel elements. Further, the sectorial reflector restricts radiated emissions over a desired sector angle, minimizing radiation in undesirable directions, such as toward mounting walls or other nearby surfaces that would cause unwanted signal reflections, such as might aggravate multipath signal phenomenon.
    Type: Application
    Filed: August 8, 2002
    Publication date: October 2, 2003
    Inventors: Chunfei Ye, Erping Li