Patents by Inventor Chung-Chieh Hsu

Chung-Chieh Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240186963
    Abstract: In accordance with an aspect of the present disclosure, a radio frequency front end system is provided. The radio frequency front end system comprises an RF path configured to propagate an RF signal between ports of the RF path, an RF coupler configured to extract a portion of a power of the RF signal propagating between the ports of the RF path, and a first RF coupler circuit. The first RF coupler circuit is coupled to the RF coupler and includes a first isolator configured to isolate at least one of a switching transient impedance and a charge spur from the RF path.
    Type: Application
    Filed: November 9, 2023
    Publication date: June 6, 2024
    Inventors: Shao-Min Hsu, Sreedhar Vineel Reddy Kaipu, Chung-Chieh Lin
  • Patent number: 11996481
    Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu, Yu-Ming Lin, Chung-Wei Hsu
  • Patent number: 11991840
    Abstract: This disclosure is directed to an electronic device having a casing, a circular frame, and a display. A panel is arranged on one side of the casing, a circular opening is defined on the panel, and a first fixing structure is arranged on an inner edge of the circular opening. The circular frame is rotatably arranged in the circular opening to close the circular opening, a second fixing structure is arranged on an outer edge of the circular frame, and the second fixing structure is limited by the first fixing structure. The display is embedded in the circular frame and exposed on the panel, so that the display is rotatable according to various placing positions of the casing.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: May 21, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chia-Yuan Lin, Chih-Yuan Hsu, Chung-Chieh Cheng
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11923433
    Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
  • Publication number: 20240069277
    Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Yi Kuo, Chen-Hua Yu, Cheng-Chieh Hsieh, Che-Hsiang Hsu, Chung-Ming Weng, Tsung-Yuan Yu
  • Patent number: 11551927
    Abstract: A high electron mobility transistor includes: a first semiconductor layer over a substrate, and a second semiconductor layer over the first semiconductor layer, the second semiconductor layer having a band gap discontinuity with the first semiconductor layer, and at the first semiconductor layer and/or the second conductive layer includes indium. A top layer is over the second semiconductor layer, and a metal layer is over, and extends into, the top layer, the top layer separating the metal layer from the second semiconductor layer. A gate electrode is over the top layer, a third semiconductor layer being between the gate electrode and the top layer, where a sidewall of the third semiconductor layer and a sidewall of the metal layer are separated. A source and drain are on opposite sides of the gate electrode, the top layer extending continuously from below the source, below the gate electrode, and below the drain.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: January 10, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Chun Liu, Chung-Chieh Hsu, Chi-Ming Chen, Chung-Yi Yu, Chen-Hao Chiang, Min-Chang Ching
  • Publication number: 20210050209
    Abstract: A high electron mobility transistor includes: a first semiconductor layer over a substrate, and a second semiconductor layer over the first semiconductor layer, the second semiconductor layer having a band gap discontinuity with the first semiconductor layer, and at the first semiconductor layer and/or the second conductive layer includes indium. A top layer is over the second semiconductor layer, and a metal layer is over, and extends into, the top layer, the top layer separating the metal layer from the second semiconductor layer. A gate electrode is over the top layer, a third semiconductor layer being between the gate electrode and the top layer, where a sidewall of the third semiconductor layer and a sidewall of the metal layer are separated. A source and drain are on opposite sides of the gate electrode, the top layer extending continuously from below the source, below the gate electrode, and below the drain.
    Type: Application
    Filed: November 4, 2020
    Publication date: February 18, 2021
    Inventors: Po-Chun LIU, Chung-Chieh HSU, Chi-Ming CHEN, Chung-Yi YU, Chen-Hao CHIANG, Min-Chang CHING
  • Patent number: 10867792
    Abstract: A high electron mobility transistor (HEMT) includes a substrate, and a channel layer over the substrate, wherein and at least one of the channel layer or the active layer comprises indium. The HEMT further includes an active layer over the channel layer. The active layer has a band gap discontinuity with the channel layer.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Chun Liu, Chi-Ming Chen, Min-Chang Ching, Chen-Hao Chiang, Chung-Yi Yu, Chung-Chieh Hsu
  • Patent number: 9741600
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: August 22, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Hsieh, Chung-chieh Hsu, Chian-kun Chan, Chih-Kuo Chang, Chih-Ping Chen, Hsu-Shui Liu, Kai Lo, Wei-ting Hsiao, Yung-Kai Lin
  • Publication number: 20160284584
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Application
    Filed: June 7, 2016
    Publication date: September 29, 2016
    Inventors: Hsieh Chih-Chang, Chung-chieh Hsu, Chian-kun Chan, Chih-Kuo Chang, Chih-Ping Cheng-Jen, Hsu-Shui Liu, Lo Kai, Wei-ting Hsiao, Yung-Kai Lin
  • Patent number: 9425077
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Hsieh, Yung-Kai Lin, Hsu-Shui Liu, Kai Lo, Chih-Ping Chen, Chian-Kun Chan, Chung-Chieh Hsu, Chih-Kuo Chang, Wei-Ting Hsiao
  • Publication number: 20150236146
    Abstract: A high electron mobility transistor (HEMT) includes a substrate, and a channel layer over the substrate, wherein and at least one of the channel layer or the active layer comprises indium. The HEMT further includes an active layer over the channel layer. The active layer has a band gap discontinuity with the channel layer.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Chun LIU, Chi-Ming CHEN, Min-Chang CHING, Chen-Hao CHIANG, Chung-Yi YU, Chung-Chieh HSU
  • Publication number: 20140273505
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Application
    Filed: April 9, 2013
    Publication date: September 18, 2014
    Inventors: Chih-Chang HSIEH, Yung-Kai Lin, Hsu-Shui Liu, Kai Lo, Chih-Ping Chen, Chian-Kun Chan, Chung-Chieh Hsu, Chih-Kuo Chang, Wei-Ting Hsiao
  • Patent number: 8275752
    Abstract: Distributed network-based data backup, recovery and deletion methods and a distributed network system thereof are provided. The methods include respectively establishing peer-to-peer connections between a host storage server and a plurality of peer storage servers, dividing original data into a plurality of data segments, generating a plurality of data segment copies corresponding to the data segments according to a minimum survival rate and the number of peer storage servers. The methods also include transmitting the data segment copies to the peer storage servers, wherein the number of data segment copies for each of the data segments is equal to a redundancy, and the redundancy is smaller than the number of the peer storage servers, and the data segment copies distributed to any one of the peer storage servers correspond to a portion of all the data segments. Accordingly, the methods can effectively and safely backup the original data.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: September 25, 2012
    Assignee: Industrual Technology Resesarch Institute
    Inventors: Chia-Ying Tsai, Chun-Yu Wang, Chung-Chieh Hsu, Hsu-Cheng Lin, Yi-Chang Zhuang
  • Publication number: 20120005165
    Abstract: Distributed network-based data backup, recovery and deletion methods and a distributed network system thereof are provided. The methods include respectively establishing peer-to-peer connections between a host storage server and a plurality of peer storage servers, dividing original data into a plurality of data segments, generating a plurality of data segment copies corresponding to the data segments according to a minimum survival rate and the number of peer storage servers. The methods also include transmitting the data segment copies to the peer storage servers, wherein the number of data segment copies for each of the data segments is equal to a redundancy, and the redundancy is smaller than the number of the peer storage servers, and the data segment copies distributed to any one of the peer storage servers correspond to a portion of all the data segments. Accordingly, the methods can effectively and safely backup the original data.
    Type: Application
    Filed: August 27, 2010
    Publication date: January 5, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Ying Tsai, Chun-Yu Wang, Chung-Chieh Hsu, Hsu-Cheng Lin, Yi-Chang Zhuang