Abstract: A data strobe receiver that includes a first comparator. The first comparator has a first input that is coupled to a first reference voltage. The first comparator has a second input that is coupled to a data strobe. The first comparator also has an output. The data strobe receiver also includes a delay element. The delay element has an input that is coupled to the output of the first comparator. The delay element also has an enable input and an output. The data strobe receiver also includes a second comparator. The second comparator has a first input that is coupled to a second voltage reference. The second comparator has a second input that is coupled to the data strobe. The second comparator also has an output. The data strobe receiver also includes a flip-flop. The flip-flop has a preset input that is coupled to the output of the second comparator. The flip-flop has a clock input that is coupled to the output of the delay element.

Abstract: A phase-locked loop circuit and method for providing for compensation for an offset. A phase-locked loop circuit comprises a phase detector, a compensation circuit, a loop filter, and a VCO. The phase detector is coupled to receive a first input signal and a second input signal. The phase detector is configured to output one or more of a plurality of output signals indicative of a difference between the first input signal and the second input signal. The compensation circuit is coupled to receive the output signals and to reduce a voltage offset between the output signals. The compensation circuit is further configured to provide a plurality of compensated output signals. The loop filter is coupled to receive the compensated control signals. The loop filter is configured to output a first control signal. The VCO is coupled to receive the first control signal and to output the second input signal based on the first control signal.

Abstract: A phase-locked loop circuit and method for providing for compensation for an offset. A phase-locked loop circuit comprises a phase detector, a compensation circuit, a loop filter, and a VCO. The phase detector is coupled to receive a first input signal and a second input signal. The phase detector is configured to output one or more of a plurality of output signals indicative of a difference between the first input signal and the second input signal. The compensation circuit is coupled to receive the output signals and to reduce a voltage offset between the output signals. The compensation circuit is further configured to provide a plurality of compensated output signals. The loop filter is coupled to receive the compensated control signals. The loop filter is configured to output a first control signal. The VCO is coupled to receive the first control signal and to output the second input signal based on the first control signal.